\n| ADCx_GS<\/td>\n | General status register<\/td>\n | \u901a\u7528\u72b6\u6001\u5bc4\u5b58\u5668<\/td>\n | CALF（b1）<\/td>\n | \u6821\u51c6\u5931\u8d25\u6807\u5fd7（0=\u6210\u529f，1=\u5931\u8d25，\u9700\u51991\u6e05\u96f6）<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n1.2 ADC\u4ee3\u7801\u5b9e\u73b0<\/h3>\n\u2460 adc.c<\/p>\n \/\/adc.c
\n#include "adc.h"
\n#include "MCIMX6Y2.h"
\n#include "core_ca7.h"
\n#include "fsl_iomuxc.h"<\/p>\n \/\/ADC\u81ea\u6821\u51c6
\nint adc1_calibration(void)
\n{
\n ADC1->GC |= (1 << 7); \/\/\u6821\u51c6\u4f7f\u80fd，\u6821\u51c6\u5b8c\u6210\u540e\u6b64\u4f4d\u4f1a\u81ea\u52a8\u6e05\u96f6
\n while((ADC1->GC & (1 << 7)) != 0); \/\/\u7b49\u5f85\u6821\u51c6\u5b8c\u6210
\n \/\/\u6821\u51c6\u6807\u5fd7\u4f4d：0：\u4ee3\u8868\u6210\u529f 1：\u4ee3\u8868\u5931\u8d25，\u51991\u6e05\u96f6
\n if((ADC1->GS & (1 << 1)) == 0)
\n {
\n return 1;
\n }
\n else
\n {
\n return 0;
\n }
\n}<\/p>\n \/\/ADC\u521d\u59cb\u5316
\nvoid adc1_channel_init(void)
\n{
\n \/\/1.\u5f15\u811a\u590d\u7528
\n IOMUXC_SetPinMux(IOMUXC_GPIO1_IO01_GPIO1_IO01,0);
\n \/\/2.\u7535\u6c14\u5c5e\u6027
\n IOMUXC_SetPinConfig(IOMUXC_GPIO1_IO01_GPIO1_IO01, IOMUXC_SW_PAD_CTL_PAD_PKE(1));
\n IOMUXC_SetPinConfig(IOMUXC_GPIO1_IO01_GPIO1_IO01, IOMUXC_SW_PAD_CTL_PAD_PUE(0));
\n \/\/3.\u914d\u7f6eADC
\n ADC1->HC[0] &= ~( 1 << 7); \/\/\u7981\u7528\u8f6c\u6362\u5b8c\u6210\u4e2d\u65ad
\n ADC1->CFG = 0;
\n ADC1->CFG |= (2 << 2) | (3 << 0); \/\/\u5206\u8fa8\u7387\u9009\u62e9 12 \u4f4d，\u65f6\u949f\u6e90\u9009\u62e9 ADACK
\n ADC1->GC = 0;
\n ADC1->GC |= (1 << 0); \/\/\u4f7f\u80fd ADACK \u8fd9\u4e2a\u65f6\u949f
\n \/\/ADC\u6821\u51c6
\n printf(adc1_calibration() ? "calibration completed normally!\\\\n" : "calibration completed failed!\\\\n");
\n}
\n\/\/\u8bfb\u53d6ADC\u539f\u59cb\u503c
\nunsigned short adc1_get_origin_value(void)
\n{
\n \/\/1.\u542f\u52a8ADC\u8f6c\u6362
\n ADC1->HC[0] = 0; \/\/\u6bcf\u5207\u6362\u4e00\u6b21\u901a\u9053\u5c31\u4f1a\u5b8c\u6210\u4e00\u6b21ADC\u8f6c\u6362
\n ADC1->HC[0] = 1;
\n \/\/2.\u7b49\u5f85ADC\u88c5\u6362\u5b8c\u6210
\n while((ADC1->HS & (1 << 0)) == 0);
\n \/\/3.\u8bfb\u53d6ADC\u539f\u59cb\u503c
\n return ADC1->R[0] & 0xFFF;
\n}
\nfloat get_adc_value()
\n{
\n \/\/\u91cf\u5316\u7ed3\u679c\u8f6c\u6362\u516c\u5f0f
\n return ((get_adc_original_value() \/ 4096.0) * 3.3);
\n}<\/p>\n \u00a0 \u901a\u8fc7\u7ed3\u679c\u770b\u5230\u5f53\u524d\u5b58\u5728\u8f83\u5927\u6ce2\u52a8，\u9700\u8981\u8fdb\u884c\u6ee4\u6ce2\u5904\u7406\u3002\u5e38\u7528\u7684\u6ee4\u6ce2\u65b9\u6cd5\u5305\u62ec：\u5747\u503c\u6ee4\u6ce2\u3001\u4f4e\u901a\u6ee4\u6ce2\u3001\u9ad8\u901a\u6ee4\u6ce2\u4ee5\u53ca\u5177\u6709\u9884\u6d4b\u6027\u7684\u5361\u5c14\u66fc\u6ee4\u6ce2\u7b49\u3002\u8fd9\u91cc\u6211\u4eec\u91c7\u7528\u5747\u503c\u6ee4\u6ce2\u7b97\u6cd5\u8fdb\u884c\u5904\u7406，\u5177\u4f53\u5b9e\u73b0\u4ee3\u7801\u5982\u4e0b：<\/p>\n \u00a0 \u00a0 \u00a0 \u00a0 \u5176\u6838\u5fc3\u601d\u8def\u662f：\u6bcf\u6b21\u8f6c\u6362\u91c7\u6837100\u6b21\u6570\u636e，\u5bf9\u8fd9\u4e9b\u91c7\u6837\u503c\u8fdb\u884c\u6392\u5e8f\u540e，\u5254\u966410\u4e2a\u6700\u5927\u503c\u548c10\u4e2a\u6700\u5c0f\u503c，\u6700\u540e\u53d6\u5269\u4f59\u6570\u636e\u7684\u5e73\u5747\u503c\u4f5c\u4e3a\u6700\u7ec8\u91cf\u5316\u7ed3\u679c\u5e76\u8fdb\u884c\u8f6c\u6362\u3002<\/p>\n \/\/adc.c
\n#include "adc.h"
\n#include "MCIMX6Y2.h"
\n#include "core_ca7.h"
\n#include "fsl_iomuxc.h"<\/p>\n \/\/ADC\u81ea\u6821\u51c6
\nint adc1_calibration(void)
\n{
\n ADC1->GC |= (1 << 7);
\n while((ADC1->GC & (1 << 7)) != 0);
\n if((ADC1->GS & (1 << 1)) == 0)
\n {
\n return 1;
\n }
\n else
\n {
\n return 0;
\n }
\n}<\/p>\n \/\/ADC\u521d\u59cb\u5316
\nvoid adc1_channel_init(void)
\n{
\n \/\/1.\u5f15\u811a\u590d\u7528
\n IOMUXC_SetPinMux(IOMUXC_GPIO1_IO01_GPIO1_IO01,0);
\n \/\/2.\u7535\u6c14\u5c5e\u6027
\n IOMUXC_SetPinConfig(IOMUXC_GPIO1_IO01_GPIO1_IO01, IOMUXC_SW_PAD_CTL_PAD_PKE(1));
\n IOMUXC_SetPinConfig(IOMUXC_GPIO1_IO01_GPIO1_IO01, IOMUXC_SW_PAD_CTL_PAD_PUE(0));
\n \/\/3.\u914d\u7f6eADC
\n ADC1->HC[0] &= ~( 1 << 7);
\n ADC1->CFG = 0;
\n ADC1->CFG |= (2 << 2) | (3 << 0);
\n ADC1->GC = 0;
\n ADC1->GC |= (1 << 0);
\n \/\/ADC\u6821\u51c6
\n printf(adc1_calibration() ? "calibration completed normally!\\\\n" : "calibration completed failed!\\\\n");
\n}
\n\/\/\u8bfb\u53d6ADC\u539f\u59cb\u503c
\nunsigned short adc1_get_origin_value(void)
\n{
\n \/\/1.\u542f\u52a8ADC\u8f6c\u6362
\n ADC1->HC[0] = 0;
\n ADC1->HC[0] = 1;
\n \/\/2.\u7b49\u5f85ADC\u88c5\u6362\u5b8c\u6210
\n while((ADC1->HS & (1 << 0)) == 0);
\n \/\/3.\u8bfb\u53d6ADC\u539f\u59cb\u503c
\n return ADC1->R[0] & 0xFFF;<\/p>\n }<\/p>\n \/\/\u4ea4\u6362
\nvoid swap(unsigned short *a, unsigned short *b)
\n{
\n unsigned short t = *a;
\n *a = *b;
\n *b = t;
\n}
\n\/\/\u5192\u6ce1\u6392\u5e8f
\nvoid sort(unsigned short *a, int len)
\n{
\n int i = 0;
\n int j = 0;
\n for(i = 0; i < len-1; i++)
\n {
\n for(j = 0; j < len – 1 -i; j++)
\n {
\n if(a[j] > a[j + 1])
\n {
\n swap(&a[j], &a[j + 1]);
\n }
\n }
\n }
\n}<\/p>\n \/\/ADC\u91c7\u6837\u503c\u6c42\u548c
\nunsigned int sum_of_array(unsigned short *a, int len)
\n{
\n int i =0;
\n unsigned int sum = 0;
\n for(i = 0; i < len; i++)
\n {
\n sum += a[i];
\n }
\n return sum;
\n}<\/p>\n \/\/\u8bfb\u53d6ADC\u7535\u538b\u503c
\nfloat adc1_get_value(void)
\n{
\n unsigned short a[100];
\n int i = 0;
\n for(i = 0; i < 100; i++)
\n {
\n a[i] = adc1_get_origin_value();
\n }
\n sort(a, sizeof(a) \/ sizeof(a[0]));
\n return sum_of_array(a + 10, 80) \/ 80 \/ 4095.0 * 3.3;
\n}<\/p>\n \u2461 main.c\u00a0<\/p>\n #include "MCIMX6Y2.h"
\n#include "fsl_iomuxc.h"
\n#include "led.h"
\n#include "beep.h"
\n#include "key.h"
\n#include "core_ca7.h"
\n#include "interrupt.h"
\n#include "clock.h"
\n#include "epit.h"
\n#include "gpt.h"
\n#include "delay.h"
\n#include "uart.h"
\n#include "stdio.h"
\n#include "i2c.h"
\n#include "lm75.h"
\n#include "adc.h"
\nint main(void)
\n{
\n \/\/\u65f6\u949f\u521d\u59cb\u5316
\n clock_init();
\n \/\/GIC\u521d\u59cb\u5316
\n system_interrupt_init();
\n \/\/led\u521d\u59cb\u5316
\n led_init();
\n \/\/\u8702\u9e23\u5668beep\u521d\u59cb\u5316
\n beep_init();
\n \/\/\u6309\u952e\u521d\u59cb\u5316
\n key_init();
\n \/\/EPIT\u521d\u59cb\u5316
\n \/\/ epit_init();
\n \/\/GPT\u521d\u59cb\u5316
\n gpt_init();
\n \/\/\u4e32\u53e3uart\u521d\u59cb\u5316
\n uart_init();
\n \/\/I2C\u521d\u59cb\u5316
\n i2c_init();
\n \/\/ADC\u521d\u59cb\u5316
\n adc1_channel_init();
\n led_off();
\n beep_off();<\/p>\n while (1)
\n {
\n short t = adc1_get_origin_value();
\n printf("origin_value:%d\\\\n", t);
\n float f = adc1_get_value();
\n int k = f * 1000;
\n int m = k \/ 1000;
\n int n = k % 1000;
\n printf("voltage:%d.%d\\\\n", m, n);
\n }
\n return 0;
\n}<\/p>\n \u4e8c\u3001SPI(\u4e32\u884c\u5916\u8bbe\u63a5\u53e3)<\/h2>\n2.1 SPI\u529f\u80fd\u4ecb\u7ecd<\/h3>\n\u2460 SPI（Serial Peripheral interface）：\u4e32\u884c\u5916\u8bbe\u63a5\u53e3，\u4e00\u79cd\u9ad8\u901f\u3001\u5168\u53cc\u5de5\u3001\u540c\u6b65\u7684\u4e32\u884c\u901a\u4fe1\u603b\u7ebf<\/span>，\u6807\u51c6SPI\u7684\u901a\u4fe1\u901f\u7387\u4e00\u822c\u4e3a1MHz~100MHz<\/span>，\u5e7f\u6cdb\u5e94\u7528\u4e8eEEPROM\u3001FLASH\u5b58\u50a8\u5668\u3001\u5b9e\u65f6\u65f6\u949f\u3001AD\u8f6c\u6362\u5668\u7b49\u8bbe\u5907，\u4ee5\u53ca\u6570\u5b57\u4fe1\u53f7\u5904\u7406\u5668\u4e0e\u89e3\u7801\u5668\u4e4b\u95f4\u7684\u901a\u4fe1\u3002\u8be5\u63a5\u53e3\u4ec5\u9700\u5360\u7528\u82af\u7247\u7684\u56db\u6839\u5f15\u811a\u7ebf\u5373\u53ef\u5b9e\u73b0\u6570\u636e\u4f20\u8f93\u3002<\/p>\n\u2461\u00a0\u6807\u51c6SPI\u91c7\u7528\u56db\u7ebf\u5236\u7ec4\u7f51\u65b9\u5f0f<\/span><\/p>\n![\"\"](\"https:\/\/www.wsisp.com\/helps\/wp-content\/uploads\/2026\/08\/20260803005645-6a6fe74d3f327.png\") <\/p>\n<\/p>\n
\n- SCLK：<\/span>\u65f6\u949f\u4fe1\u53f7\u7ebf\u3002\u4e0eI2C\u7c7b\u4f3c\u7684，\u6240\u6709\u8bbe\u5907\u90fd\u9700\u8981\u65f6\u949f\u4fe1\u53f7\u7ebf\u8fdb\u884c\u540c\u6b65，\u8be5\u4fe1\u53f7\u7531\u4e3b\u673a\u8d1f\u8d23\u63d0\u4f9b；<\/li>\n
- MOSI（Master Output Slave Input）：<\/span>\u4e3b\u51fa\u4ece\u5165，\u76f8\u5f53\u4e8e\u4e3b\u673a\u7684\u6570\u636e\u53d1\u9001\u7ebf；<\/li>\n
- MISO（Master Input Slave Output）：<\/span>\u4e3b\u5165\u4ece\u51fa，\u76f8\u5f53\u4e8e\u4e3b\u673a\u7684\u6570\u636e\u63a5\u6536\u7ebf；<\/li>\n
- CS(Slave Select\/Chip Select)：<\/span>\u7247\u9009\u4fe1\u53f7，\u4e0eI2C\u4e0d\u540c， SPI\u8bbe\u5907\u6ca1\u6709\u6240\u8c13\u7684\u4ece\u673a\u5730\u5740，\u8fde\u63a5\u5728\u603b\u7ebf\u4e0a\u7684\u8bbe\u5907\u901a\u8fc7CS\u7247\u9009\u4fe1\u53f7\u9009\u62e9\u9700\u8981\u8fdb\u884c\u901a\u4fe1\u7684\u4ece\u8bbe\u5907\u3002\u5728\u540c\u4e00\u65f6\u523b，\u603b\u7ebf\u4e0a\u53ea\u6709\u4e00\u4e2a\u5916\u8bbe\u88ab\u9009\u62e9， CS\u4fe1\u53f7\u7ebf\u901a\u5e38\u662f\u4f4e\u7535\u5e73\u6709\u6548\u7684\u3002<\/span><\/li>\n
- \u6ce8\u610f：<\/span>MOSI\u548cMISO\u5e76\u975e\u5fc5\u987b\u540c\u65f6\u5b58\u5728，\u53ef\u4ee5\u4ec5\u4fdd\u7559MOSI\u6216MISO\u3002\u4f46\u8fd9\u79cd\u65b9\u5f0f\u4ec5\u652f\u6301\u5355\u5de5\u901a\u4fe1，\u6b64\u65f6SPI\u88ab\u79f0\u4e3a\u4e09\u7ebf\u5236\u3002\u5177\u4f53\u91c7\u7528\u4e09\u7ebf\u8fd8\u662f\u56db\u7ebf\u53d6\u51b3\u4e8e\u5916\u8bbe\u9700\u6c42\u3002\u4f8b\u5982，OLCD\u53ea\u9700\u8981\u4e3b\u673a\u53d1\u9001\u6570\u636e\u800c\u65e0\u9700\u4ece\u673a\u8fd4\u56de\u6570\u636e，\u56e0\u6b64\u9002\u5408\u91c7\u7528\u4e09\u7ebf\u5236SPI\u8fde\u63a5\u65b9\u5f0f\u3002<\/li>\n<\/ul>\n
\u2462\u00a0SPI\u7684\u6570\u636e\u4f20\u8f93\u7684\u65f6\u5e8f<\/span><\/p>\n<\/p>\n\n- \u65f6\u949f\u6781\u6027（CPOL，Clock Polarity）：<\/span>\u89c4\u5b9a\u4e86\u65f6\u949f\u4fe1\u53f7\u7ebf\u5728\u7a7a\u95f2\u65f6\u7684\u72b6\u6001， CPOL=0\u8868\u793a\u65f6\u949f\u4fe1\u53f7\u7ebf\u5728\u7a7a\u95f2\u65f6\u4e3a\u4f4e\u7535\u5e73； CPOL=1\u8868\u793a\u65f6\u949f\u4fe1\u53f7\u7ebf\u5728\u7a7a\u95f2\u662f\u4e3a\u9ad8\u7535\u5e73；<\/li>\n
- \u65f6\u949f\u76f8\u4f4d（CPHA，Clock Phase）：<\/span>\u4e0eI2C\u4e0d\u540c， SPI\u7684\u6570\u636e\u63a5\u6536\u65b9\u5e76\u4e0d\u662f\u5728\u65f6\u949f\u9ad8\u6216\u8005\u4f4e\u7535\u5e73\u65f6\u91c7\u6837\u7684，\u800c\u662f\u5728\u65f6\u949f\u4fe1\u53f7\u5904\u4e8e\u6cbf\u65f6（\u63a5\u6536\u65b9\u5728\u7b2c\u51e0\u4e2a\u8fb9\u6cbf\u91c7\u6837\u6570\u636e），\u81f3\u4e8e\u662f\u5728\u4e0a\u5347\u6cbf\u8fd8\u662f\u4e0b\u964d\u6cbf\u53d6\u51b3\u4e8eCPHA\u3002 CPHA=0\u8868\u793a\u662f\u5728\u65f6\u949f\u4fe1\u53f7\u53d8\u5316\u7684\u7b2c\u4e00\u4e2a\u6cbf\u65f6\u91c7\u6837，CPHA=1\u8868\u793a\u662f\u5728\u65f6\u949f\u4fe1\u53f7\u53d8\u5316\u7684\u7b2c\u4e8c\u4e2a\u6cbf\u65f6\u91c7\u6837\u3002<\/li>\n
- \u4f4d\u5e8f（\u9ad8\u4f4d\u5148\u884c\/\u4f4e\u4f4d\u5148\u884c）\u672a\u660e\u786e\u89c4\u5b9a，\u9ed8\u8ba4\u9ad8\u4f4dMSB\u5148\u884c\u3002<\/span><\/li>\n
- SPI\u56db\u79cd\u5de5\u4f5c\u65b9\u5f0f：<\/span>\u5177\u4f53\u4f7f\u7528\u54ea\u79cd\u65b9\u5f0f\u662f\u7531\u5916\u8bbe\u5382\u5bb6\u89c4\u5b9a<\/li>\n<\/ul>\n
\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0CPOL = 1，CPHA = 0： SCLK\u7a7a\u95f2\u4e3a\u9ad8\u7535\u5e73， SPI\u4e0b\u964d\u6cbf\u91c7\u6837；
\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0CPOL = 1，CPHA = 1： SCLK\u7a7a\u95f2\u4e3a\u9ad8\u7535\u5e73， SPI\u4e0a\u5347\u6cbf\u91c7\u6837；
\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0CPOL = 0，CPHA = 0： SCLK\u7a7a\u95f2\u4e3a\u4f4e\u7535\u5e73， SPI\u4e0a\u5347\u6cbf\u91c7\u6837；
\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0CPOL = 0，CPHA = 1： SCLK\u7a7a\u95f2\u4e3a\u4f4e\u7535\u5e73， SPI\u4e0b\u964d\u6cbf\u91c7\u6837；<\/p>\n ![\"\"](\"https:\/\/www.wsisp.com\/helps\/wp-content\/uploads\/2026\/08\/20260803005645-6a6fe74dbd890.png\") <\/p>\n
<\/ul>\n\u2463 SPI\u8bfb\u5199\u7279\u6027：\u5199\u5373\u662f\u8bfb， \u8bfb\u5373\u662f\u5199<\/span><\/p>\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0SPI\u662f\u5168\u53cc\u5de5\u79fb\u4f4d\u901a\u4fe1：<\/span>\u8bfb\u5199\u65f6\u5e8f\u53ef\u4ee5\u4e00\u8d77\u5b8c\u6210\u3002\u4e3b\u4ece\u4e24\u4fa7\u5404\u6709\u4e00\u4e2a\u79fb\u4f4d\u5bc4\u5b58\u5668\u3002\u6bcf\u4e2a\u65f6\u949f\u6cbf\u5230\u6765\u65f6，\u4e3b\u673a\u901a\u8fc7 MOSI \u5f80\u5916\u201c\u79fb\u51fa\u201d1\u4f4d，\u540c\u65f6\u4ece MISO \u201c\u79fb\u5165\u201d1\u4f4d\u3002\u4e5f\u5c31\u662f\u2014\u6bcf\u201c\u5199\u201d\u4e00\u4f4d\u7684\u540c\u65f6\u5fc5\u7136\u201c\u8bfb\u201d\u5230\u4e00\u4f4d\u3002<\/p>\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u5199\u5373\u662f\u8bfb：<\/span>\u4f60\u5f80\u603b\u7ebf\u201c\u5199\u201d\u4e00\u4e2a\u5b57\u8282（\u79fb\u51fa8\u4f4d），\u540c\u4e00\u8fc7\u7a0b\u91cc\u4e5f\u4f1a\u201c\u8bfb\u201d\u56de\u4ece\u673a\u5728MISO\u4e0a\u76848\u4f4d（\u53ef\u80fd\u662f\u65e0\u6548\/\u5360\u4f4d\u5b57\u8282）\u3002<\/p>\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u8bfb\u5373\u662f\u5199：<\/span>\u4f60\u60f3\u4ece\u4ece\u673a\u201c\u8bfb\u201d\u6570\u636e，\u5fc5\u987b\u63d0\u4f9b\u65f6\u949f，\u6240\u4ee5\u4e3b\u673a\u5fc5\u987b\u540c\u65f6\u201c\u5199\u201d\u51fa\u4e00\u4e2a\u5360\u4f4d\u5b57\u8282（\u901a\u5e38\u662f0xFF\u62160x00），\u7528\u8fd9\u4e9b\u65f6\u949f\u628a\u4ece\u673a\u7684\u6570\u636e\u201c\u79fb\u5165\u201d\u3002<\/p>\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u4e3b\u673a\u5199：<\/span>\u4e3b\u673a\u901a\u8fc7MOSI\u53d1\u9001\u5bc4\u5b58\u5668\u5730\u5740 -> \u4e3b\u673a\u901a\u8fc7MOSI\u53d1\u9001\u6570\u636e-> \u4ece\u673a\u901a\u8fc7MISO\u56de\u590d\u6570\u636e
\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u4e3b\u673a\u8bfb：<\/span>\u4e3b\u673a\u901a\u8fc7MOSI\u53d1\u9001\u5bc4\u5b58\u5668\u5730\u5740 -> \u4e3b\u673a\u901a\u8fc7MOSI\u53d1\u9001dummy(0x00 ~ 0xFF) -> \u4ece\u673a\u901a\u8fc7MISO\u56de\u590d\u4f20\u611f\u5668\u6570\u636e<\/p>\n![\"\"](\"https:\/\/www.wsisp.com\/helps\/wp-content\/uploads\/2026\/08\/20260803005646-6a6fe74e29225.png\") <\/p>\n
\u2464\u00a0SPI \u4e0e I2C \u7684\u533a\u522b<\/span><\/p>\n（1）\u63a5\u53e3\u7ebf\u6570<\/span><\/p>\n\n- I2C：\u56fa\u5b9a\u4f7f\u7528\u4e24\u6839\u7ebf（SCL \u65f6\u949f\u7ebf，SDA \u6570\u636e\u7ebf）<\/li>\n
- SPI：\u901a\u5e38\u4f7f\u7528\u4e09\u7ebf\u6216\u56db\u7ebf（SCLK \u65f6\u949f\u7ebf，CS \u7247\u9009\u7ebf，MOSI \u4e3b\u51fa\u4ece\u5165，MISO \u4e3b\u5165\u4ece\u51fa）<\/li>\n<\/ul>\n
（2）\u5bfb\u5740\u65b9\u5f0f<\/span><\/p>\n\n- I2C：\u901a\u8fc7\u4e03\u4f4d\u4ece\u673a\u5730\u5740\u5bf9\u4ece\u673a\u8fdb\u884c\u5bfb\u5740<\/li>\n
- SPI：\u901a\u8fc7\u5c06\u5bf9\u5e94\u7684\u7247\u9009(CS)\u7535\u5e73\u62c9\u4f4e\u62c9\u9009\u62e9\u4e0e\u54ea\u4e2a\u4ece\u673a\u8fdb\u884c\u901a\u4fe1<\/li>\n<\/ul>\n
（3）\u901a\u4fe1\u901f\u7387<\/span><\/p>\n\n- I2C：\u6807\u51c6\u6a21\u5f0f100Kbps，\u9ad8\u901f\u6a21\u5f0f400Kbps<\/li>\n
- SPI：\u901f\u7387\u53ef\u8fbeMHz\u7ea7\u522b，\u901a\u5e38\u4e3a\u51e0\u5341\u81f3\u51e0\u767eMHz<\/li>\n<\/ul>\n
（4）\u901a\u4fe1\u7279\u6027<\/span><\/p>\n\n- I2C：\u534a\u53cc\u5de5\u3001\u540c\u6b65\u3001\u4e32\u884c\u901a\u4fe1<\/li>\n
- SPI：\u5168\u53cc\u5de5\u3001\u540c\u6b65\u3001\u4e32\u884c\u901a\u4fe1<\/li>\n<\/ul>\n
2.2\u00a0IMX6ULL \u7684 SPI \u6a21\u5757<\/h3>\n\u2460 I.MX6ULL \u81ea\u5e26\u7684 SPI \u5916\u8bbe\u53eb\u505a ECSPI，\u5168\u79f0\u662f Enhanced Configurable Serial Peripheral Interface\u3002 ECSPI \u6709 64*32 \u4e2a\u63a5\u6536FIFO(RXFIFO)\u548c 64*32 \u4e2a\u53d1\u9001 FIFO(TXFIFO)\u3002<\/p>\n \u2461 I.MX6ULL \u7684 ECSPI \u53ef\u4ee5\u5de5\u4f5c\u5728\u4e3b\u6a21\u5f0f\u6216\u4ece\u6a21\u5f0f，\u6211\u4eec\u4f7f\u7528\u4e3b\u6a21\u5f0f， I.MX6ULL \u6709 4 \u4e2aECSPI，\u6bcf\u4e2a ECSPI \u652f\u6301\u56db\u4e2a\u7247\u9009\u4fe1\u53f7
\n\u2462\u00a0ECSPI \u7684\u4e3b\u8981\u7279\u6027\u5305\u62ec：<\/span><\/p>\n\n- \u5168\u53cc\u5de5\u540c\u6b65\u4e32\u884c\u63a5\u53e3<\/li>\n
- \u53ef\u914d\u7f6e\u4e3a\u4e3b\u673a\/\u4ece\u673a\u6a21\u5f0f<\/li>\n
- \u56db\u4e2a\u7247\u9009（SS）\u4fe1\u53f7，\u652f\u6301\u591a\u4e2a\u5916\u8bbe<\/li>\n
- \u4f20\u8f93\u7ee7\u7eed\u529f\u80fd\u5141\u8bb8\u8fdb\u884c\u65e0\u957f\u5ea6\u9650\u5236\u7684\u6570\u636e\u4f20\u8f93<\/li>\n
- \u53d1\u9001\u548c\u63a5\u6536\u6570\u636e\u5747\u914d\u5907 32 \u4f4d\u5bbd\u300164 \u9879\u7684 FIFO（\u5148\u8fdb\u5148\u51fa）<\/li>\n
- \u7247\u9009（SS）\u548c SPI \u65f6\u949f（SCLK）\u7684\u6781\u6027\u548c\u76f8\u4f4d\u53ef\u914d\u7f6e<\/li>\n
- \u652f\u6301\u76f4\u63a5\u5185\u5b58\u8bbf\u95ee（DMA）<\/li>\n
- \u6700\u9ad8\u5de5\u4f5c\u9891\u7387\u53ef\u8fbe\u53c2\u8003\u65f6\u949f\u9891\u7387<\/li>\n<\/ul>\n
\u2463 \u65f6\u949f\u9009\u62e9：\u4ece\u65f6\u949f\u6811\u53ef\u4ee5\u770b\u51fa， ECSPI\u65f6\u949f\u6e90\u662fpll3_sw_clk = 480MHz，\u7ecf\u8fc7\u4e00
\n\u4e2a8\u5206\u9891\u7684\u9759\u6001\u5206\u9891\u5668，\u5b9e\u9645\u5de5\u4f5c\u9891\u7387\u662f60MHz；<\/p>\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u6ce8\u610f：<\/span>PRE_DIVIDER\u548cPOST_DIVIDER\u8fd9\u4e24\u4e2a\u5206\u914d\u5668\u51b3\u5b9a\u4e86SPI\u6700\u7ec8\u7684\u65f6\u949f，\u7531\u4e8e\u9ed8\u8ba4\u60c5\u51b5\u4e0bSPI\u7684\u65f6\u949f\u6765\u6e90\u4e8epll3_sw_clk\u76848\u5206\u9891\u5373480M\/8=60MHz，\u5982\u679c\u9700\u8981SPI\u65f6\u949f\u4fe1\u53f7\u4e3a1MHz，\u5219\u53ef\u5c06POST_DIVIDER\u8bbe\u7f6e\u4e3a4\u5206\u9891，60\/4=15MHz,\u518d\u5c0615M\u8fdb\u884c15\u5206\u9891，<\/p>\n15MHz\/15=1MHz\u3002
\n\u2464\u00a0\u91cd\u70b9\u5bc4\u5b58\u5668\u4ecb\u7ecd<\/span><\/p>\n\n\n\u5bc4\u5b58\u5668\u5168\u79f0\u4f5c\u7528\u4f4d\u8bf4\u660e<\/tr>\n \n| ECSPIx_RXDATA<\/td>\n | Receive Data Register<\/td>\n | \u63a5\u53d7\u6570\u636e\u5bc4\u5b58\u5668<\/td>\n | ECSPI_RXDATA<\/td>\n | 32\u4f4d，\u8bfb\u53d6\u53ca\u5b58\u53d6 ECSPIx_RXDATA\u91cc\u9762\u7684\u6570\u636e\u5c31\u53ef\u4ee5\u5f97\u5230
\n\u521a\u521a\u63a5\u6536\u5230\u7684\u6570\u636e
\n\u00a0<\/td>\n<\/tr>\n | \n| ECSPIx_TXDATA<\/td>\n | Transmit Data Register<\/td>\n | \u53d1\u9001\u6570\u636e\u5bc4\u5b58\u5668<\/td>\n | ECSPIx_TXDATA<\/td>\n | 32\u4f4d，\u53d1\u9001\u6570\u636e\u5c31\u5411\u5bc4\u5b58\u5668 ECSPIx_TXDATA \u5199\u5165\u6570\u636e
\n\u00a0<\/td>\n<\/tr>\n | \n| ECSPIx_CONREG<\/td>\n | Control Register<\/td>\n | \u63a7\u5236\u5bc4\u5b58\u5668<\/td>\n | BURST_LENGTH(b20-b31)<\/td>\n | \n \u6570\u636e\u957f\u5ea6\u4f4d：\u6bcf\u6b21\u4f20\u8f93\u4e00\u5b57\u8282\u7684\u8bdd\u5c31\u8bbe\u7f6e\u4e3a7<\/p>\n<\/td>\n<\/tr>\n | \n| CHANNEL_SELECT(b18-b19)<\/td>\n | \n \u901a\u9053\u9009\u62e9\u4f4d<\/p>\n \u00a0 \u00a0 \u00a0 \u00a0 00：\u901a\u90530<\/p>\n \u00a0 \u00a0 \u00a0 \u00a0 01：\u901a\u90531<\/p>\n \u00a0 \u00a0 \u00a0 \u00a0 10：\u901a\u90532<\/p>\n \u00a0 \u00a0 \u00a0 \u00a0 11：\u901a\u90533<\/p>\n<\/td>\n<\/tr>\n | \n| PRE_DIVIDER(b12-b15)<\/td>\n | \n SPI \u9884\u5206\u9891<\/p>\n ECSPI \u65f6\u949f\u9891\u7387\u4f7f\u7528\u4e24\u6b65\u6765\u5b8c\u6210\u5206\u9891，\u6b64\u4f4d\u8bbe\u7f6e\u7684\u662f\u7b2c\u4e00\u6b65,\u53ef\u8bbe\u7f6e 0~15，\u5206\u522b\u5bf9\u5e94 1~16 \u5206\u9891\u3002<\/p>\n<\/td>\n<\/tr>\n | \n| POST_DIVIDER(b8-b11)<\/td>\n | \n SPI \u5206\u9891\u503c<\/p>\n ECSPI \u65f6\u949f\u9891\u7387\u7684\u7b2c\u4e8c\u6b65\u5206\u9891\u8bbe\u7f6e<\/p>\n \u5206\u9891\u503c\u4e3a 2^ POST_DIVIDER<\/p>\n<\/td>\n<\/tr>\n | \n| CHANNEL_MODE(b4-b7)<\/td>\n | SPI \u901a\u9053\u4e3b\/\u4ece\u6a21\u5f0f\u8bbe\u7f6e,CHANNEL_MODE[3:0]\u5206\u522b\u5bf9\u5e94 SPI\u901a\u9053 3~0，\u4e3a 0 \u7684\u8bdd\u5c31\u662f\u8bbe\u7f6e\u4e3a\u4ece\u6a21\u5f0f，\u5982\u679c\u4e3a 1 \u7684\u8bdd\u5c31\u662f\u4e3b\u6a21\u5f0f\u3002<\/td>\n<\/tr>\n | \n| SMC(b3)<\/td>\n | \u5f00\u59cb\u6a21\u5f0f\u63a7\u5236，\u6b64\u4f4d\u53ea\u80fd\u5728\u4e3b\u6a21\u5f0f\u4e0b\u8d77\u4f5c\u7528，\u4e3a 0 \u7684\u8bdd\u901a\u8fc7 XCH \u4f4d\u6765\u5f00\u542f SPI\u7a81\u53d1\u8bbf\u95ee，\u4e3a 1 \u7684\u8bdd\u53ea\u8981\u5411 TXFIFO \u5199\u5165\u6570\u636e\u5c31\u5f00\u542f SPI \u7a81\u53d1\u8bbf\u95ee；<\/td>\n<\/tr>\n | \n| EN(b0)<\/td>\n | SPI \u4f7f\u80fd\u4f4d，\u4e3a 0 \u7684\u8bdd\u5173\u95ed SPI，\u4e3a 1 \u7684\u8bdd\u4f7f\u80fd SPI<\/td>\n<\/tr>\n | \n| ECSPIx_CONFIGREG<\/td>\n | Config Register<\/td>\n | \u914d\u7f6e\u5bc4\u5b58\u5668<\/td>\n | SCLK_CTL(b20-b23)<\/td>\n | \n \u8bbe\u7f6e SCLK \u4fe1\u53f7\u7ebf\u7a7a\u95f2\u72b6\u6001\u7535\u5e73<\/p>\n SCLK_CTL[3:0]\u5206\u522b\u5bf9\u5e94\u901a\u9053 3 ~0<\/p>\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u4e3a 0 \u7684\u8bdd SCLK \u7a7a\u95f2\u72b6\u6001\u4e3a\u4f4e\u7535\u5e73<\/p>\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u4e3a 1 \u7684\u8bdd SCLK \u7a7a\u95f2\u72b6\u6001\u4e3a\u9ad8\u7535\u5e73<\/p>\n<\/td>\n<\/tr>\n | \n| SS_POL(b12-b15)<\/td>\n | \n \u8bbe\u7f6e SPI \u7247\u9009\u4fe1\u53f7\u6781\u6027\u8bbe\u7f6e<\/p>\n SS_POL[3:0]\u5206\u522b\u5bf9\u5e94\u901a\u9053 3~0<\/p>\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u4e3a 0 \u7684 \u8bdd\u7247\u9009\u4fe1\u53f7\u4f4e\u7535\u5e73\u6709\u6548<\/p>\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u4e3a 1 \u7684\u8bdd\u7247\u9009\u4fe1\u53f7\u9ad8\u7535\u5e73\u6709\u6548<\/p>\n<\/td>\n<\/tr>\n | \n| SCLK_POL(b4-b7)<\/td>\n | SPI \u65f6\u949f\u4fe1\u53f7\u6781\u6027\u8bbe\u7f6e，\u4e5f\u5c31\u662f CPOL，SCLK_POL[3:0]\u5206\u522b\u5bf9\u5e94\u901a\u9053 3~0，\u4e3a 0 \u7684\u8bdd SCLK \u9ad8\u7535\u5e73\u6709\u6548(\u7a7a\u95f2\u7684\u65f6\u5019\u4e3a\u4f4e\u7535\u5e73)，\u4e3a 1 \u7684\u8bdd SCLK \u4f4e\u7535\u5e73\u6709\u6548(\u7a7a\u95f2\u7684\u65f6\u5019\u4e3a\u9ad8\u7535\u5e73)；<\/td>\n<\/tr>\n | \n| SCLK_PHA()<\/td>\n | SPI\u65f6\u949f\u76f8\u4f4d\u8bbe\u7f6e，\u4e5f\u5c31\u662fCPHA， SCLK_PHA[3:0]\u5206\u522b\u5bf9\u5e94\u901a\u90533~0，\u4e3a 0 \u7684\u8bdd\u4e32\u884c\u65f6\u949f\u7684\u7b2c\u4e00\u4e2a\u8df3\u53d8\u6cbf(\u4e0a\u5347\u6cbf\u6216\u4e0b\u964d\u6cbf)\u91c7\u96c6\u6570\u636e，\u4e3a 1 \u7684\u8bdd\u4e32\u884c\u65f6\u949f\u7684\u7b2c\u4e8c\u4e2a\u8df3\u53d8\u6cbf(\u4e0a\u5347\u6cbf\u6216\u4e0b\u964d\u6cbf)
\n\u91c7\u96c6\u6570\u636e<\/td>\n<\/tr>\n | \n| ECSPIx_STATREG<\/td>\n | Status Register<\/td>\n | \u72b6\u6001\u5bc4\u5b58\u5668<\/td>\n | RR(b3)<\/td>\n | \n RXFIFO \u5c31\u7eea\u6807\u5fd7\u4f4d<\/p>\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u4e3a 0 \u7684\u8bdd RXFIFO \u6ca1\u6709\u6570\u636e<\/p>\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u4e3a 1 \u7684\u8bdd\u8868\u793a RXFIFO \u4e2d \u81f3\u5c11\u6709\u4e00\u4e2a\u5b57\u7684\u6570\u636e<\/p>\n<\/td>\n<\/tr>\n | \n| TE(b0)<\/td>\n | TXFIFO \u7a7a\u6807\u5fd7\u4f4d，\u4e3a 0 \u8868\u793a TXFIFO \u4e2d\u81f3\u5c11\u6709\u4e00\u4e2a\u5b57\u7684\u6570\u636e，\u4e3a 1 \u8868\u793a TXFIFO\u4e3a\u7a7a
\n\u00a0<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n2.3\u00a0IMX6ULL \u4f7f\u7528 SPI\u00a0\u4e0eADXL345 \u901a\u4fe1<\/h3>\n\u00a0\u2460\u00a0ADXL345\u662f\u4e00\u6b3e\u4e09\u8f74\u52a0\u901f\u5ea6\u4f20\u611f\u5668<\/span>，\u4e3b\u8981\u7279\u70b9\u5982\u4e0b：
\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u27a2 \u6d4b\u91cf\u8303\u56f4： \u00b12g\u3001 \u00b14g\u3001 \u00b18g\u3001 \u00b116g<\/span>\u8bbe\u7f6e；1g = 9.8m\/s^2<\/span>
\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u27a2 \u5206\u8fa8\u7387：\u6700\u9ad813\u4f4d（3.9mg\/LSB）；0 – 2^13-1<\/span><\/p>\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u27a2 \u7075\u654f\u5ea6：32 \/ (2^13 – 1) = 32\/8191 = 0.0039 = 3.9mg
\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u27a2 \u5de5\u4f5c\u7535\u538b： 2.0V\u81f33.6V；<\/span>
\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u27a2 \u4f4e\u529f\u8017：\u6d4b\u91cf\u6a21\u5f0f\u4ec50.23mA，\u5f85\u673a\u6a21\u5f0f40\u03bcA；
\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u27a2 \u6838\u5fc3\u529f\u80fd： 1\u3001\u4e09\u8f74\u52a0\u901f\u5ea6\u6d4b\u91cf（X\u3001 Y\u3001 Z）； 2\u3001\u9759\u6001\u91cd\u529b\u52a0\u901f\u5ea6\u6d4b\u91cf； 3\u3001\u52a8\u6001\u52a0\u901f\u5ea6（\u9707\u52a8\u3001\u8fd0\u52a8）\u6d4b\u91cf； 4\u3001\u81ea\u7531\u843d\u4f53\u68c0\u6d4b； 5\u3001\u5355\u51fb\/\u53cc\u51fb\u68c0\u6d4b； 6\u3001\u6d3b\u52a8\/\u975e\u6d3b\u52a8\u76d1\u6d4b；
\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u27a2 \u63a5\u53e3\u652f\u6301： SPI（3\u7ebf\u548c4\u7ebf\u6a21\u5f0f）\u3001 I2C\u6570\u5b57\u63a5\u53e3
\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u27a2 \u7279\u8272\u529f\u80fd： 1\u3001\u5185\u7f6e32\u7ea7FIFO\u7f13\u51b2； 2\u3001\u53ef\u7f16\u7a0b\u4e2d\u65ad\u529f\u80fd； 3\u3001\u81ea\u52a8\u4f11\u7720\u548c\u5524\u9192\u529f\u80fd；
\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u27a2 \u5e94\u7528\u573a\u666f： 1\u3001\u79fb\u52a8\u8bbe\u5907\u65b9\u5411\u68c0\u6d4b； 2\u3001\u6e38\u620f\u548c\u865a\u62df\u73b0\u5b9e\u63a7\u5236\u5668； 3\u3001\u8fd0\u52a8\u68c0\u6d4b\u548c\u8ba1\u6b65\u5668； 4\u3001\u9632\u76d7\u7cfb\u7edf\u7684\u8fd0\u52a8\u68c0\u6d4b； 5\u3001\u5de5\u4e1a\u632f\u52a8\u76d1\u6d4b； 6\u3001\u533b\u7597\u8bbe\u5907\u59ff\u6001\u68c0\u6d4b<\/p>\n\u2461\u00a0\u901a\u4fe1\u65f6\u5e8f\u5982\u4e0b\u56fe，\u91c7\u7528\u56db\u7ebf\u5236SPI\u3002\u53ef\u89c1ADXL345\u91c7\u7528\u7684\u662fSPI\u901a\u4fe1\u6a21\u5f0f3，\u5373CPOL=1.CPHA=1<\/span>\u3002\u8fd9\u91cc\u9700\u8981\u6ce8\u610f\u4e00\u4e2a\u7ec6\u8282， ADXL345\u5728\u5411\u5bc4\u5b58\u5668\u5199\u5165\u548c\u8bfb\u53d6\u65f6，\u5bc4\u5b58\u5668\u7684\u6700\u9ad8\u4f4d\u662f\u4e0d\u4e00\u6837\u7684，\u8bfb\u7684\u65f6\u5019\u6700\u9ad8\u4f4d\u4e3a1，\u5199\u7684\u65f6\u5019\u6700\u9ad8\u4f4d\u4e3a0\u3002<\/span>\u4f8b\u5982\u5199\u6570\u636e\u52300x20\u5bc4\u5b58\u5668\u65f6，\u5148\u53d10x20\u518d\u53d1\u8981\u5199\u5165\u7684\u6570\u636e；\u8bfb\u53d6\u65f6\u5219\u9700\u8981\u5148\u53d10xA0，\u4e4b\u540e\u8fdb\u5165\u8bfb\u53d6\u65f6\u5e8f\u3002<\/p>\n![\"\"](\"https:\/\/www.wsisp.com\/helps\/wp-content\/uploads\/2026\/08\/20260803005646-6a6fe74ed4f0c.png\") <\/p>\n
\u2462 spi.c<\/p>\n \/\/spi.c
\n#include "spi.h"
\n#include "MCIMX6Y2.h"
\n#include "core_ca7.h"
\n#include "fsl_iomuxc.h"
\n\/\/SPI\u521d\u59cb\u5316
\nvoid spi3_init(void)
\n{
\n \/\/1.\u5f15\u811a\u590d\u7528
\n IOMUXC_SetPinMux(IOMUXC_UART2_RX_DATA_ECSPI3_SCLK, 0);
\n IOMUXC_SetPinMux(IOMUXC_UART2_RTS_B_ECSPI3_MISO, 0);
\n IOMUXC_SetPinMux(IOMUXC_UART2_CTS_B_ECSPI3_MOSI, 0);
\n IOMUXC_SetPinMux(IOMUXC_UART2_TX_DATA_GPIO1_IO20,0);
\n \/\/2.\u7535\u6c14\u5c5e\u6027
\n IOMUXC_SetPinConfig(IOMUXC_UART2_RX_DATA_ECSPI3_SCLK, 0x10B1);
\n IOMUXC_SetPinConfig(IOMUXC_UART2_RTS_B_ECSPI3_MISO, 0x10B1);
\n IOMUXC_SetPinConfig(IOMUXC_UART2_CTS_B_ECSPI3_MOSI, 0x10B1);
\n IOMUXC_SetPinConfig(IOMUXC_UART2_TX_DATA_GPIO1_IO20, 0x10B1);
\n \/\/3.\u901a\u4fe1\u524d，\u5148\u5c06CS\u62c9\u9ad8
\n GPIO1->GDIR |= (1 << 20);
\n GPIO1->DR |= (1 << 20); \/\/\u8f93\u51fa
\n \/\/4.\u914d\u7f6eCONREG
\n ECSPI3->CONREG = 0;
\n ECSPI3->CONREG |= (7 << 20) | (0x0E << 12) | (2 << 8) | (1 << 4) | (1 << 3);
\n \/\/5.\u914d\u7f6eCONFIGREG
\n ECSPI3->CONFIGREG = 0;
\n ECSPI3->CONFIGREG |= (1 << 20) | (1 << 4) | (1 << 0);
\n \/\/6.\u4f7f\u80fdSPI
\n ECSPI3->CONREG |= (1 << 0);
\n}
\n\/\/SPI\u8bfb\u5199\u51fd\u6570
\nunsigned int spi3_read_write(unsigned int data)
\n{
\n while((ECSPI3->STATREG &= (1 << 0)) == 0); \/\/\u7b49\u5f85\u6570\u636e\u53d1\u9001\u5b8c\u6210
\n ECSPI3->TXDATA = data;
\n while ((ECSPI3->STATREG &= (1 << 3)) == 0); \/\/\u7b49\u5f85\u6570\u636e\u63a5\u53d7\u5b8c\u6210
\n return ECSPI3->RXDATA ;
\n}<\/p>\n \u2463 adxl345.c<\/p>\n \/\/adxl345.c
\n#include "adxl345.h"
\n#include "spi.h"
\n#include "MCIMX6Y2.h"<\/p>\n \/\/ adxl345\u5199
\nvoid adxl345_write(unsigned char reg_address, unsigned char data)
\n{
\n \/\/ 1. \u7247\u9009\u62c9\u4f4e
\n GPIO1->DR &= ~(1 << 20);
\n \/\/ 2. \u53d1\u9001\u5bc4\u5b58\u5668\u5730\u5740
\n spi3_read_write(reg_address);
\n \/\/ 3. \u53d1\u9001\u5199\u5165\u7684\u6570\u636e
\n spi3_read_write(data);
\n \/\/ 4. \u7247\u9009\u62c9\u9ad8
\n GPIO1->DR |= (1 << 20);
\n}<\/p>\n \/\/ adxl345\u8bfb
\nunsigned char adxl345_read(unsigned char reg_address)
\n{
\n unsigned char ret = 0;<\/p>\n \/\/ 1. \u7247\u9009\u62c9\u4f4e
\n GPIO1->DR &= ~(1 << 20);
\n \/\/ 2. \u53d1\u9001\u5bc4\u5b58\u5668\u5730\u5740
\n spi3_read_write(reg_address | 0x80);
\n \/\/ 3. \u53d1\u9001\u5360\u4f4d\u5b57\u8282
\n ret = spi3_read_write(0xFF);
\n \/\/ 4. \u7247\u9009\u62c9\u9ad8
\n GPIO1->DR |= (1 << 20);<\/p>\n return ret;
\n}<\/p>\n \/\/adxl345\u521d\u59cb\u5316
\nvoid adxl345_init(void)
\n{
\n \/\/\u5173\u95ed\u4e2d\u65ad
\n adxl345_write(0x2E, 0x08);
\n \/\/\u6ee1\u5206\u8fa8\u7387 13\u4f4d
\n adxl345_write(0x31, 0x0B);
\n \/\/\u901f\u738725HZ
\n adxl345_write(0x2C, 0x08);
\n \/\/\u5de5\u4f5c\u6a21\u5f0f
\n adxl345_write(0x2D, 0x0B);
\n}<\/p>\n struct ADXL345_Data adxl345_get_value(void)
\n{
\n struct ADXL345_Data ret;
\n \/\/X\u8f74\u6570\u636e
\n ret.x = adxl345_read(0x32);
\n ret.x |= adxl345_read(0x33) << 8;
\n \/\/y\u8f74\u6570\u636e
\n ret.y = adxl345_read(0x34);
\n ret.y |= adxl345_read(0x35) << 8;
\n \/\/z\u8f74\u6570\u636e
\n ret.z = adxl345_read(0x36);
\n ret.z |= adxl345_read(0x37) << 8;
\n \/\/\u52a0\u901f\u5ea6
\n ret.xg = ret.x * 0.0039;
\n ret.yg = ret.y * 0.0039;
\n ret.zg = ret.z * 0.0039;
\n return ret;
\n}
\n\/\/adxl345.h
\n#ifndef __ADXL345_H__
\n#define __ADXL345_H__
\nstruct ADXL345_Data
\n{
\n short x;
\n short y;
\n short z;
\n float xg;
\n float yg;
\n float zg;
\n};
\nextern void adxl345_write(unsigned char reg_address, unsigned char data);
\nextern unsigned char adxl345_read(unsigned char reg_address);
\nextern void adxl345_init(void);
\nextern struct ADXL345_Data adxl345_get_value(void);
\n#endif <\/p>\n \u2464 main.c<\/p>\n #include "MCIMX6Y2.h"
\n#include "fsl_iomuxc.h"
\n#include "led.h"
\n#include "beep.h"
\n#include "key.h"
\n#include "core_ca7.h"
\n#include "interrupt.h"
\n#include "clock.h"
\n#include "epit.h"
\n#include "gpt.h"
\n#include "delay.h"
\n#include "uart.h"
\n#include "stdio.h"
\n#include "i2c.h"
\n#include "lm75.h"
\n#include "adc.h"
\n#include "spi.h"
\n#include "adxl345.h"
\nint main(void)
\n{
\n \/\/\u65f6\u949f\u521d\u59cb\u5316
\n clock_init();
\n \/\/GIC\u521d\u59cb\u5316
\n system_interrupt_init();
\n \/\/led\u521d\u59cb\u5316
\n led_init();
\n \/\/\u8702\u9e23\u5668beep\u521d\u59cb\u5316
\n beep_init();
\n \/\/\u6309\u952e\u521d\u59cb\u5316
\n key_init();
\n \/\/EPIT\u521d\u59cb\u5316
\n \/\/ epit_init();
\n \/\/GPT\u521d\u59cb\u5316
\n gpt_init();
\n \/\/\u4e32\u53e3uart\u521d\u59cb\u5316
\n uart_init();
\n \/\/I2C\u521d\u59cb\u5316
\n i2c_init();
\n \/\/ADC\u521d\u59cb\u5316
\n adc1_channel_init();
\n \/\/SP\u521d\u59cb\u5316
\n spi3_init();
\n led_off();
\n beep_off();
\n \/\/ unsigned char t = adxl345_read(0x00);
\n \/\/ printf("adxl345_ID:%x\\\\n", t);<\/p>\n while (1)
\n {
\n struct ADXL345_Data t = adxl345_get_value();
\n \/\/ printf("x:%d y:%d z:%d\\\\n", t.x, t.y, t.z);
\n int i, j, k;
\n i = t.xg * 10;
\n j = t.yg * 10;
\n k = t.zg * 10;
\n printf("x_accel:%d.%d y_accel:%d.%d z_accel:%d.%d\\\\n", i \/ 10, i % 10, j \/ 10, j % 10, k \/ 10, k % 10);
\n delay_ms(1000);
\n }
\n return 0;
\n}<\/p>\n","protected":false},"excerpt":{"rendered":" \u4e00\u3001ADC（\u6a21\u6570\u8f6c\u6362\u5668）1.1 ADC\u529f\u80fd\u4ecb\u7ecd\u2460 ADC（Analog-to-Digital Converter），\u6a21\u62df\u5230\u6570\u5b57\u8f6c\u6362\u5668，\u7528\u4e8e\u5c06\u8fde\u7eed\u53d8\u5316\u7684\u6a21\u62df\u4fe1\u53f7\u8f6c\u6362\u4e3a\u79bb\u6563\u7684\u6570\u5b57\u4fe1\u53f7，\u4ee5\u4fbf\u6570\u5b57\u7cfb\u7edf（\u5982\u5fae\u5904\u7406\u5668\u3001\u5fae\u63a7\u5236\u5668\u7b49）\u80fd\u591f\u5bf9\u5176\u8fdb\u884c\u5904\u7406\u548c\u5206\u6790\u3002\u2461 \u6a21\u62df\u4fe1\u53f7\u4e00\u822c\u662f\u6307\u8fde\u7eed\u53d8\u5316\u7684\u7535\u538b\u4fe1\u53f7，\u5176\u6570\u503c\u5728\u4e00\u5b9a\u8303\u56f4\u5185\u53d8\u5316\u3002\u800c\u6570\u5b57\u4fe1\u53f7\u662f\u7531\u4e00\u7cfb\u5217\u79bb\u6563\u7684\u6570\u5b57\u8868\u793a<\/p>\n","protected":false},"author":2,"featured_media":89548,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[174,58,103,270,269],"topic":[],"class_list":["post-89555","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-server","tag-c","tag-linux","tag-ubuntu","tag-270","tag-269"],"yoast_head":"\n ARM06-ADC\uff08\u6a21\u6570\u8f6c\u6362\u5668\uff09\u548c SPI(\u4e32\u884c\u5916\u8bbe\u63a5\u53e3) - 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