{"id":65066,"date":"2026-01-24T13:40:13","date_gmt":"2026-01-24T05:40:13","guid":{"rendered":"https:\/\/www.wsisp.com\/helps\/65066.html"},"modified":"2026-01-24T13:40:13","modified_gmt":"2026-01-24T05:40:13","slug":"%e4%ba%94%e7%ba%a7%e6%b5%81%e6%b0%b4%e7%ba%bf-risc-v-cpu-%e8%ae%be%e8%ae%a1%e4%b8%8e%e5%ae%9e%e7%8e%b0%e8%af%a6%e8%a7%a3","status":"publish","type":"post","link":"https:\/\/www.wsisp.com\/helps\/65066.html","title":{"rendered":"\u4e94\u7ea7\u6d41\u6c34\u7ebf RISC-V CPU \u8bbe\u8ba1\u4e0e\u5b9e\u73b0\u8be6\u89e3"},"content":{"rendered":"<h2>\u4e00\u3001\u8bbe\u8ba1\u6982\u8ff0<\/h2>\n<p>\u8fd9\u662f\u4e00\u4e2a\u5b8c\u6574\u7684\u4e94\u7ea7\u6d41\u6c34\u7ebf RISC-V CPU \u5b9e\u73b0&#xff0c;\u91c7\u7528\u7ecf\u5178\u7684\u54c8\u4f5b\u67b6\u6784&#xff0c;\u652f\u6301 RISC-V \u57fa\u7840\u6307\u4ee4\u96c6\u3002\u8bbe\u8ba1\u5b9e\u73b0\u4e86\u4ece\u53d6\u6307\u4ee4\u5230\u5199\u56de\u7684\u5b8c\u6574\u6d41\u6c34\u7ebf&#xff0c;\u5305\u542b\u4e86\u5192\u9669\u5904\u7406\u673a\u5236&#xff0c;\u662f\u4e00\u4e2a\u6559\u5b66\u7ea7\u7684 CPU \u8bbe\u8ba1\u8303\u4f8b\u3002<\/p>\n<h3>\u4e8c\u3001\u6d41\u6c34\u7ebf\u67b6\u6784<\/h3>\n<h4>2.1 \u4e94\u7ea7\u6d41\u6c34\u7ebf\u9636\u6bb5\u5212\u5206<\/h4>\n<p>text<\/p>\n<p>\u250c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510    \u250c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510    \u250c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510    \u250c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510    \u250c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510<br \/>\n\u2502  IF   \u2502\u2500\u2500\u2500\u25b6\u2502  ID   \u2502\u2500\u2500\u2500\u25b6\u2502  EX   \u2502\u2500\u2500\u2500\u25b6\u2502  MEM  \u2502\u2500\u2500\u2500\u25b6\u2502  WB   \u2502<br \/>\n\u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518    \u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518    \u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518    \u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518    \u2514\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2518<br \/>\n  \u53d6\u6307\u4ee4       \u8bd1\u7801\/\u8bfb       \u6267\u884c        \u8bbf\u5b58        \u5199\u56de<br \/>\n             \u5bc4\u5b58\u5668<\/p>\n<h4>2.2 \u5404\u9636\u6bb5\u529f\u80fd\u8be6\u89e3<\/h4>\n<li>IF \u9636\u6bb5&#xff08;Instruction Fetch&#xff09;\u529f\u80fd&#xff1a;\u4ece\u6307\u4ee4\u5b58\u50a8\u5668\u4e2d\u8bfb\u53d6\u6307\u4ee4<\/li>\n<p>\u5173\u952e\u6a21\u5757&#xff1a;PC&#xff08;\u7a0b\u5e8f\u8ba1\u6570\u5668&#xff09;<\/p>\n<p>\u7279\u70b9&#xff1a;<\/p>\n<ul>\n<li>\u652f\u6301\u987a\u5e8f\u6267\u884c&#xff08;PC&#043;4&#xff09;\u548c\u8df3\u8f6c\u6267\u884c<\/li>\n<li>\u9047\u5230\u5206\u652f \/ \u8df3\u8f6c\u65f6\u4f1a\u4ea7\u751f\u51b2\u5237\u4fe1\u53f7<\/li>\n<li>\u652f\u6301\u6307\u4ee4\u5b58\u50a8\u5668\u521d\u59cb\u5316<\/li>\n<\/ul>\n<p>verilog<\/p>\n<p>\/\/ IF\u9636\u6bb5\u6838\u5fc3\u4ee3\u7801<br \/>\nalways&#064;(posedge clk) begin<br \/>\n    if(load) begin<br \/>\n        if(jump_sel) pc_addr &lt;&#061; jump_addr;    \/\/ \u8df3\u8f6c<br \/>\n        else pc_addr &lt;&#061; pc_addr &#043; 4;          \/\/ \u987a\u5e8f\u6267\u884c<br \/>\n    end<br \/>\nend<\/p>\n<li>ID \u9636\u6bb5&#xff08;Instruction Decode&#xff09;\u529f\u80fd&#xff1a;\u6307\u4ee4\u89e3\u7801 &#043; \u5bc4\u5b58\u5668\u8bfb\u53d6<\/li>\n<p>\u5173\u952e\u6a21\u5757&#xff1a;<\/p>\n<ul>\n<li>decoder&#xff1a;\u6307\u4ee4\u89e3\u7801&#xff0c;\u4ea7\u751f\u63a7\u5236\u4fe1\u53f7<\/li>\n<li>regfile&#xff1a;\u5bc4\u5b58\u5668\u6587\u4ef6&#xff0c;\u8bfb\u53d6\u6e90\u64cd\u4f5c\u6570<\/li>\n<\/ul>\n<p>\u7279\u70b9&#xff1a;<\/p>\n<ul>\n<li>\u652f\u6301 RISC-V \u6240\u6709\u57fa\u672c\u6307\u4ee4\u683c\u5f0f&#xff08;R\/I\/S\/B\/U\/J&#xff09;<\/li>\n<li>\u7acb\u5373\u6570\u751f\u6210\u903b\u8f91\u5b8c\u6574<\/li>\n<li>\u5305\u542b\u6570\u636e\u524d\u9012\u903b\u8f91\u89e3\u51b3\u6570\u636e\u5192\u9669<\/li>\n<\/ul>\n<p>verilog<\/p>\n<p>\/\/ \u6307\u4ee4\u89e3\u7801<br \/>\ndecoder decoder_dut(<br \/>\n    .instruction(instruction),<br \/>\n    .r1_addr(r1_addr), .r2_addr(r2_addr),<br \/>\n    .imm_data(imm_data), .rd_addr(rd_addr),<br \/>\n    .funccode(funccode), .opcode(opcode)<br \/>\n);<\/p>\n<p>\/\/ \u6570\u636e\u524d\u9012\u903b\u8f91&#xff08;\u89e3\u51b3RAW\u5192\u9669&#xff09;<br \/>\nassign r1_data &#061; (rd_addr_d3&#061;&#061;r1_addr)?rd_data:((rd_addr_d4&#061;&#061;r1_addr)?rd_data_wb:r1_data_regfile);<\/p>\n<li>EX \u9636\u6bb5&#xff08;Execute&#xff09;\u529f\u80fd&#xff1a;\u7b97\u672f\u903b\u8f91\u8fd0\u7b97<\/li>\n<p>\u5173\u952e\u6a21\u5757&#xff1a;ALU&#xff08;\u7b97\u672f\u903b\u8f91\u5355\u5143&#xff09;<\/p>\n<p>\u7279\u70b9&#xff1a;<\/p>\n<ul>\n<li>\u652f\u6301 12 \u79cd\u57fa\u672c\u8fd0\u7b97&#xff08;\u52a0\u51cf\u4e58\u9664\u3001\u903b\u8f91\u8fd0\u7b97\u3001\u79fb\u4f4d\u3001\u6bd4\u8f83&#xff09;<\/li>\n<li>\u5305\u542b\u5206\u652f\u6761\u4ef6\u5224\u65ad<\/li>\n<li>\u8ba1\u7b97\u7ed3\u679c\u4f20\u9012\u5230\u540e\u7eed\u9636\u6bb5<\/li>\n<\/ul>\n<p>verilog<\/p>\n<p>\/\/ ALU\u8fd0\u7b97\u793a\u4f8b<br \/>\ncase(opcode)<br \/>\n    7&#039;b0110011: begin  \/\/ R-type\u6307\u4ee4<br \/>\n        case(funccode)<br \/>\n            3&#039;b000: rd_data &lt;&#061; subsra?(r1_data-r2_data):(r1_data&#043;r2_data);  \/\/ SUB\/ADD<br \/>\n            3&#039;b001: rd_data &lt;&#061; (r1_data&lt;&lt;r2_data);  \/\/ SLL<br \/>\n            3&#039;b010: rd_data &lt;&#061; stl_res[31];  \/\/ SLT<br \/>\n            \/\/ &#8230; \u5176\u4ed6\u8fd0\u7b97<br \/>\n        endcase<br \/>\n    end<br \/>\nendcase<\/p>\n<li>MEM \u9636\u6bb5&#xff08;Memory Access&#xff09;\u529f\u80fd&#xff1a;\u6570\u636e\u5b58\u50a8\u5668\u8bbf\u95ee<\/li>\n<p>\u5173\u952e\u6a21\u5757&#xff1a;data_blkmem<\/p>\n<p>\u7279\u70b9&#xff1a;<\/p>\n<ul>\n<li>\u652f\u6301\u5b57\u8282\u3001\u534a\u5b57\u3001\u5b57\u8bbf\u95ee<\/li>\n<li>\u652f\u6301\u7b26\u53f7\u6269\u5c55\u548c\u96f6\u6269\u5c55<\/li>\n<li>\u54c8\u4f5b\u67b6\u6784&#xff0c;\u4e0e\u6307\u4ee4\u5b58\u50a8\u5668\u5206\u79bb<\/li>\n<\/ul>\n<p>verilog<\/p>\n<p>\/\/ \u5b58\u50a8\u5668\u8bbf\u95ee<br \/>\ndata_blkmem data_blkmem_dut(<br \/>\n    .addra(dmem_addr[31:2]),  \/\/ \u5b57\u8282\u5730\u5740\u8f6c\u5b57\u5730\u5740<br \/>\n    .wea(data_ram_wen?1:dmem_wren),  \/\/ \u5199\u4f7f\u80fd<br \/>\n    .dina(data_ram_wen?data_ram_wdata:rd_data),  \/\/ \u5199\u5165\u6570\u636e<br \/>\n    .douta(dmem_dout)  \/\/ \u8bfb\u51fa\u6570\u636e<br \/>\n);<\/p>\n<li>WB \u9636\u6bb5&#xff08;Write Back&#xff09;\u529f\u80fd&#xff1a;\u7ed3\u679c\u5199\u56de\u5bc4\u5b58\u5668\u6587\u4ef6<\/li>\n<p>\u5173\u952e\u6a21\u5757&#xff1a;regfile \u5199\u7aef\u53e3<\/p>\n<p>\u7279\u70b9&#xff1a;<\/p>\n<ul>\n<li>\u652f\u6301\u4e24\u79cd\u5199\u56de\u6765\u6e90&#xff1a;ALU \u7ed3\u679c\u548c\u5b58\u50a8\u5668\u6570\u636e<\/li>\n<li>\u5199\u64cd\u4f5c\u5728\u65f6\u949f\u4e0b\u964d\u6cbf\u8fdb\u884c&#xff0c;\u907f\u514d\u65f6\u5e8f\u51b2\u7a81<\/li>\n<li>x0 \u5bc4\u5b58\u5668\u786c\u8fde\u7ebf\u4e3a 0<\/li>\n<\/ul>\n<p>verilog<\/p>\n<p>\/\/ \u5bc4\u5b58\u5668\u6587\u4ef6\u5199\u64cd\u4f5c&#xff08;\u4e0b\u964d\u6cbf&#xff09;<br \/>\nalways&#064;(negedge clk) begin<br \/>\n    if((rd_addr&#061;&#061;i) &amp;&amp; rd_wren) begin<br \/>\n        regdata[i] &lt;&#061; rd_data;<br \/>\n    end<br \/>\nend<\/p>\n<h3>\u4e09\u3001\u5173\u952e\u6280\u672f\u5b9e\u73b0<\/h3>\n<h4>3.1 \u6570\u636e\u524d\u9012&#xff08;Forwarding&#xff09;<\/h4>\n<p>\u95ee\u9898&#xff1a;\u5f53\u540e\u7eed\u6307\u4ee4\u9700\u8981\u524d\u4e00\u6761\u6307\u4ee4\u7684\u7ed3\u679c\u65f6&#xff0c;\u4f1a\u4ea7\u751f\u6570\u636e\u5192\u9669&#xff08;RAW&#xff09;\u3002<\/p>\n<p>\u89e3\u51b3\u65b9\u6848&#xff1a;\u6570\u636e\u524d\u9012\u6280\u672f&#xff0c;\u5c06\u7ed3\u679c\u76f4\u63a5\u4f20\u9012\u7ed9\u9700\u8981\u5b83\u7684\u6307\u4ee4\u3002<\/p>\n<p>verilog<\/p>\n<p>\/\/ \u4e24\u7ea7\u524d\u9012\u903b\u8f91<br \/>\nassign r1_data &#061; (rd_addr_d3&#061;&#061;r1_addr)?rd_data:  \/\/ EX\u2192EX\u524d\u9012<br \/>\n                ((rd_addr_d4&#061;&#061;r1_addr)?rd_data_wb:  \/\/ MEM\u2192EX\u524d\u9012<br \/>\n                r1_data_regfile);  \/\/ \u6b63\u5e38\u5bc4\u5b58\u5668\u8bfb\u53d6<\/p>\n<p>\u524d\u9012\u6761\u4ef6&#xff1a;<\/p>\n<ul>\n<li>EX\u2192EX \u524d\u9012&#xff1a;\u5f53\u524d EX \u9636\u6bb5\u6307\u4ee4\u7684 rd \u4e0e ID \u9636\u6bb5\u6307\u4ee4\u7684 rs \u76f8\u540c<\/li>\n<li>MEM\u2192EX \u524d\u9012&#xff1a;\u524d\u4e00\u6761\u6307\u4ee4\u7684 rd \u4e0e\u5f53\u524d\u6307\u4ee4\u7684 rs \u76f8\u540c<\/li>\n<\/ul>\n<h4>3.2 \u63a7\u5236\u5192\u9669\u5904\u7406<\/h4>\n<p>\u95ee\u9898&#xff1a;\u5206\u652f \/ \u8df3\u8f6c\u6307\u4ee4\u6539\u53d8\u7a0b\u5e8f\u6d41&#xff0c;\u5bfc\u81f4\u5df2\u53d6\u51fa\u7684\u6307\u4ee4\u65e0\u6548\u3002<\/p>\n<p>\u89e3\u51b3\u65b9\u6848&#xff1a;\u51b2\u5237\u6d41\u6c34\u7ebf&#xff08;\u63d2\u5165 NOP&#xff09;\u3002<\/p>\n<p>verilog<\/p>\n<p>\/\/ \u5206\u652f\u5224\u65ad\u5728EX\u9636\u6bb5<br \/>\nassign flush &#061; jump_sel;  \/\/ \u8df3\u8f6c\u65f6\u51b2\u5237\u4fe1\u53f7<\/p>\n<p>\/\/ IF\u9636\u6bb5&#xff1a;\u7528NOP\u66ff\u6362\u65e0\u6548\u6307\u4ee4<br \/>\nassign instruction &#061; (halt|flush_d1)?0:inst_ram_out;<\/p>\n<p>\u51b2\u5237\u673a\u5236&#xff1a;<\/p>\n<ul>\n<li>\u5206\u652f\u6761\u4ef6\u5728 EX \u9636\u6bb5\u5224\u65ad<\/li>\n<li>\u5206\u652f\u6210\u529f\u65f6&#xff0c;\u51b2\u5237 IF \u548c ID \u9636\u6bb5&#xff08;\u63d2\u5165\u4e24\u4e2a NOP&#xff09;<\/li>\n<li>\u5206\u652f\u5ef6\u8fdf&#xff1a;2 \u4e2a\u65f6\u949f\u5468\u671f<\/li>\n<\/ul>\n<h4>3.3 \u6d41\u6c34\u7ebf\u5bc4\u5b58\u5668<\/h4>\n<p>\u4f5c\u7528&#xff1a;\u5728\u6d41\u6c34\u7ebf\u9636\u6bb5\u95f4\u4f20\u9012\u6570\u636e\u548c\u4fe1\u53f7\u3002<\/p>\n<p>verilog<\/p>\n<p>\/\/ \u6d41\u6c34\u7ebf\u5bc4\u5b58\u5668\u94fe<br \/>\nalways&#064;(posedge clk) begin<br \/>\n    pc_addr_d1  &lt;&#061; pc_addr_d0;    \/\/ IF\u2192ID<br \/>\n    pc_addr_d2  &lt;&#061; pc_addr_d1;    \/\/ ID\u2192EX<br \/>\n    rd_addr_d3  &lt;&#061; rd_addr;       \/\/ ID\u2192EX<br \/>\n    rd_addr_d4  &lt;&#061; rd_addr_d3;    \/\/ EX\u2192MEM<br \/>\n    rd_data_d4  &lt;&#061; rd_data;       \/\/ EX\u2192MEM<br \/>\nend<\/p>\n<h3>\u56db\u3001\u6307\u4ee4\u96c6\u652f\u6301<\/h3>\n<h4>4.1 \u652f\u6301\u7684\u6307\u4ee4\u7c7b\u578b<\/h4>\n<table>\n<tr>\u6307\u4ee4\u7c7b\u578b\u64cd\u4f5c\u7801\u793a\u4f8b\u6307\u4ee4\u529f\u80fd<\/tr>\n<tbody>\n<tr>\n<td>R-type<\/td>\n<td>0110011<\/td>\n<td>ADD, SUB, AND, OR, XOR<\/td>\n<td>\u5bc4\u5b58\u5668\u8fd0\u7b97<\/td>\n<\/tr>\n<tr>\n<td>I-type<\/td>\n<td>0010011<\/td>\n<td>ADDI, ANDI, ORI<\/td>\n<td>\u7acb\u5373\u6570\u8fd0\u7b97<\/td>\n<\/tr>\n<tr>\n<td>S-type<\/td>\n<td>0100011<\/td>\n<td>SW, SH, SB<\/td>\n<td>\u5b58\u50a8\u6307\u4ee4<\/td>\n<\/tr>\n<tr>\n<td>B-type<\/td>\n<td>1100011<\/td>\n<td>BEQ, BNE, BLT<\/td>\n<td>\u6761\u4ef6\u5206\u652f<\/td>\n<\/tr>\n<tr>\n<td>U-type<\/td>\n<td>0110111<\/td>\n<td>LUI, AUIPC<\/td>\n<td>\u7acb\u5373\u6570\u52a0\u8f7d<\/td>\n<\/tr>\n<tr>\n<td>J-type<\/td>\n<td>1101111<\/td>\n<td>JAL<\/td>\n<td>\u65e0\u6761\u4ef6\u8df3\u8f6c<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<h4>4.2 \u5bfb\u5740\u65b9\u5f0f<\/h4>\n<ul>\n<li>\u5bc4\u5b58\u5668\u5bfb\u5740&#xff1a;R-type \u6307\u4ee4<\/li>\n<li>\u7acb\u5373\u6570\u5bfb\u5740&#xff1a;I-type \u6307\u4ee4<\/li>\n<li>\u57fa\u5740\u5bfb\u5740&#xff1a;Load\/Store \u6307\u4ee4<\/li>\n<li>PC \u76f8\u5bf9\u5bfb\u5740&#xff1a;\u5206\u652f\u6307\u4ee4<\/li>\n<li>\u4f2a\u76f4\u63a5\u5bfb\u5740&#xff1a;\u8df3\u8f6c\u6307\u4ee4<\/li>\n<\/ul>\n<h3>\u4e94\u3001\u6027\u80fd\u5206\u6790<\/h3>\n<h4>5.1 \u65f6\u5e8f\u5206\u6790<\/h4>\n<p>text<\/p>\n<p>\u65f6\u949f\u5468\u671f:   T1     T2     T3     T4     T5     T6     T7<br \/>\nIF:       inst1  inst2  inst3  inst4  inst5  inst6  inst7<br \/>\nID:            inst1  inst2  inst3  inst4  inst5  inst6<br \/>\nEX:                  inst1  inst2  inst3  inst4  inst5<br \/>\nMEM:                       inst1  inst2  inst3  inst4<br \/>\nWB:                            inst1  inst2  inst3<\/p>\n<h4>5.2 \u6027\u80fd\u6307\u6807<\/h4>\n<p>CPI&#xff08;\u6bcf\u6761\u6307\u4ee4\u5468\u671f\u6570&#xff09;&#xff1a;<\/p>\n<ul>\n<li>\u7406\u60f3\u60c5\u51b5&#xff1a;1.0<\/li>\n<li>\u8003\u8651\u5206\u652f&#xff1a;\u7ea6 1.2-1.5<\/li>\n<li>\u8003\u8651 Load-Use \u5192\u9669&#xff1a;\u7ea6 1.1-1.3<\/li>\n<\/ul>\n<p>\u52a0\u901f\u6bd4&#xff1a;\u76f8\u5bf9\u4e8e\u5355\u5468\u671f CPU \u7ea6 3-4 \u500d<\/p>\n<p>\u541e\u5410\u91cf&#xff1a;\u6d41\u6c34\u7ebf\u6ee1\u65f6&#xff0c;\u6bcf\u4e2a\u65f6\u949f\u5468\u671f\u5b8c\u6210\u4e00\u6761\u6307\u4ee4<\/p>\n<h4>5.3 \u5192\u9669\u5206\u6790<\/h4>\n<ul>\n<li>\u7ed3\u6784\u5192\u9669&#xff1a;\u54c8\u4f5b\u67b6\u6784\u907f\u514d&#xff08;\u6307\u4ee4\u548c\u6570\u636e\u5b58\u50a8\u5668\u5206\u79bb&#xff09;<\/li>\n<li>\u6570\u636e\u5192\u9669&#xff1a;\n<ul>\n<li>RAW&#xff08;\u5199\u540e\u8bfb&#xff09;&#xff1a;\u901a\u8fc7\u6570\u636e\u524d\u9012\u89e3\u51b3<\/li>\n<li>WAR\/WAW&#xff1a;RISC-V \u987a\u5e8f\u6267\u884c&#xff0c;\u4e0d\u5b58\u5728<\/li>\n<\/ul>\n<\/li>\n<li>\u63a7\u5236\u5192\u9669&#xff1a;\u5206\u652f \/ \u8df3\u8f6c\u65f6\u51b2\u5237\u6d41\u6c34\u7ebf<\/li>\n<\/ul>\n<h3>\u516d\u3001\u8bbe\u8ba1\u7279\u70b9\u4e0e\u521b\u65b0<\/h3>\n<h4>6.1 \u53cc\u65f6\u949f\u6cbf\u8bbe\u8ba1<\/h4>\n<p>verilog<\/p>\n<p>\/\/ \u4e0a\u5347\u6cbf&#xff1a;\u5927\u591a\u6570\u903b\u8f91<br \/>\nalways&#064;(posedge clk) begin<br \/>\n    \/\/ \u6d41\u6c34\u7ebf\u5bc4\u5b58\u5668\u66f4\u65b0<br \/>\nend<\/p>\n<p>\/\/ \u4e0b\u964d\u6cbf&#xff1a;\u5bc4\u5b58\u5668\u6587\u4ef6\u5199\u5165<br \/>\nalways&#064;(negedge clk) begin<br \/>\n    \/\/ \u5bc4\u5b58\u5668\u5199\u64cd\u4f5c<br \/>\nend<\/p>\n<p>\u4f18\u70b9&#xff1a;<\/p>\n<ul>\n<li>\u907f\u514d\u8bfb\u5199\u51b2\u7a81<\/li>\n<li>\u63d0\u9ad8\u5bc4\u5b58\u5668\u6587\u4ef6\u5e26\u5bbd<\/li>\n<li>\u7b80\u5316\u65f6\u5e8f\u7ea6\u675f<\/li>\n<\/ul>\n<h4>6.2 \u5b8c\u6574\u7684\u7acb\u5373\u6570\u751f\u6210<\/h4>\n<p>verilog<\/p>\n<p>\/\/ \u652f\u6301\u6240\u6709RISC-V\u7acb\u5373\u6570\u683c\u5f0f<br \/>\ncase(instruction[6:0])<br \/>\n    7&#039;b0010011: imm_data &lt;&#061; { {20{instruction[31]}}, instruction[31:20] };  \/\/ I-type<br \/>\n    7&#039;b0100011: imm_data &lt;&#061; { {20{instruction[31]}}, instruction[31:25], instruction[11:7] };  \/\/ S-type<br \/>\n    7&#039;b1100011: imm_data &lt;&#061; { {19{instruction[31]}}, instruction[31], instruction[7], instruction[30:25], instruction[11:8], 1&#039;b0 };  \/\/ B-type<br \/>\n    \/\/ &#8230; \u5176\u4ed6\u7c7b\u578b<br \/>\nendcase<\/p>\n<h4>6.3 \u7075\u6d3b\u7684\u5b58\u50a8\u5668\u63a5\u53e3<\/h4>\n<p>verilog<\/p>\n<p>\/\/ \u652f\u6301\u4e24\u79cd\u8bbf\u95ee\u6a21\u5f0f<br \/>\ndata_blkmem data_blkmem_dut(<br \/>\n    .addra(data_ram_wen?data_ram_waddr:dmem_addr[31:2]),  \/\/ \u5730\u5740\u9009\u62e9<br \/>\n    .wea(data_ram_wen?1:dmem_wren),  \/\/ \u5199\u4f7f\u80fd\u9009\u62e9<br \/>\n    .dina(data_ram_wen?data_ram_wdata:rd_data)  \/\/ \u6570\u636e\u9009\u62e9<br \/>\n);<\/p>\n<h3>\u4e03\u3001\u6d4b\u8bd5\u4e0e\u9a8c\u8bc1<\/h3>\n<h4>7.1 \u6d4b\u8bd5\u7a0b\u5e8f\u793a\u4f8b<\/h4>\n<p>assembly<\/p>\n<p># \u7b80\u5355\u6d4b\u8bd5\u7a0b\u5e8f<br \/>\n_start:<br \/>\n    addi x1, x0, 5      # x1 &#061; 5<br \/>\n    addi x2, x0, 3      # x2 &#061; 3<br \/>\n    add  x3, x1, x2     # x3 &#061; 8<br \/>\n    sub  x4, x1, x2     # x4 &#061; 2<br \/>\n    sw   x3, 0(x0)      # \u5b58\u50a8\u5230\u5185\u5b58<br \/>\n    lw   x5, 0(x0)      # \u4ece\u5185\u5b58\u52a0\u8f7d<br \/>\n    beq  x3, x5, _end   # \u76f8\u7b49\u5219\u8df3\u8f6c<br \/>\n_end:<br \/>\n    ebreak              # \u505c\u6b62\u6267\u884c<\/p>\n<h4>\u603b\u7ed3<\/h4>\n<li>\u8be5\u8bbe\u8ba1\u57fa\u4e8e\u7ecf\u5178\u4e94\u7ea7\u6d41\u6c34\u7ebf&#xff08;IF\/ID\/EX\/MEM\/WB&#xff09;\u5b9e\u73b0 RISC-V CPU&#xff0c;\u91c7\u7528\u54c8\u4f5b\u67b6\u6784\u907f\u514d\u7ed3\u6784\u5192\u9669&#xff0c;\u6838\u5fc3\u89e3\u51b3\u4e86\u6570\u636e\u5192\u9669&#xff08;\u6570\u636e\u524d\u9012&#xff09;\u548c\u63a7\u5236\u5192\u9669&#xff08;\u6d41\u6c34\u7ebf\u51b2\u5237&#xff09;\u95ee\u9898\u3002\u5b8c\u6574\u4ee3\u7801\u6296y 29340402878<\/li>\n<li>\u8bbe\u8ba1\u5177\u5907\u5b9e\u7528\u7684\u6280\u672f\u7279\u6027&#xff1a;\u53cc\u65f6\u949f\u6cbf\u64cd\u4f5c\u907f\u514d\u5bc4\u5b58\u5668\u8bfb\u5199\u51b2\u7a81\u3001\u5b8c\u6574\u7684\u7acb\u5373\u6570\u751f\u6210\u903b\u8f91\u9002\u914d RISC-V \u5168\u6307\u4ee4\u683c\u5f0f\u3001\u7075\u6d3b\u7684\u5b58\u50a8\u5668\u63a5\u53e3\u652f\u6301\u591a\u6a21\u5f0f\u8bbf\u95ee\u3002<\/li>\n<li>\u6027\u80fd\u4e0a&#xff0c;\u7406\u60f3 CPI \u4e3a 1.0&#xff0c;\u5b9e\u9645\u53d7\u5206\u652f\u548c Load-Use \u5192\u9669\u5f71\u54cd\u7565\u6709\u4e0a\u5347&#xff0c;\u76f8\u5bf9\u4e8e\u5355\u5468\u671f CPU \u6709 3-4 \u500d\u7684\u52a0\u901f\u6bd4&#xff0c;\u6d41\u6c34\u7ebf\u6ee1\u8d1f\u8f7d\u65f6\u6bcf\u65f6\u949f\u5468\u671f\u5b8c\u6210\u4e00\u6761\u6307\u4ee4\u3002<\/li>\n","protected":false},"excerpt":{"rendered":"<p>\u4e00\u3001\u8bbe\u8ba1\u6982\u8ff0<br \/>\n\u8fd9\u662f\u4e00\u4e2a\u5b8c\u6574\u7684\u4e94\u7ea7\u6d41\u6c34\u7ebf RISC-V CPU \u5b9e\u73b0&#xff0c;\u91c7\u7528\u7ecf\u5178\u7684\u54c8\u4f5b\u67b6\u6784&#xff0c;\u652f\u6301 RISC-V \u57fa\u7840\u6307\u4ee4\u96c6\u3002\u8bbe\u8ba1\u5b9e\u73b0\u4e86\u4ece\u53d6\u6307\u4ee4\u5230\u5199\u56de\u7684\u5b8c\u6574\u6d41\u6c34\u7ebf&#xff0c;\u5305\u542b\u4e86\u5192\u9669\u5904\u7406\u673a\u5236&#xff0c;\u662f\u4e00\u4e2a\u6559\u5b66\u7ea7\u7684 CPU \u8bbe\u8ba1\u8303\u4f8b\u3002<br \/>\n\u4e8c\u3001\u6d41\u6c34\u7ebf\u67b6\u6784<br \/>\n2.1 \u4e94\u7ea7\u6d41\u6c34\u7ebf\u9636\u6bb5\u5212\u5206<br \/>\ntext<br \/>\n\u250c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510    \u250c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510    \u250c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510    \u250c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510    \u250c\u2500\u2500\u2500\u2500\u2500\u2500\u2500\u2510<br \/>\n\u2502  IF   \u2502\u2500\u2500<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[941],"topic":[],"class_list":["post-65066","post","type-post","status-publish","format-standard","hentry","category-server","tag-fpga"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v20.3 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>\u4e94\u7ea7\u6d41\u6c34\u7ebf RISC-V CPU \u8bbe\u8ba1\u4e0e\u5b9e\u73b0\u8be6\u89e3 - \u7f51\u7855\u4e92\u8054\u5e2e\u52a9\u4e2d\u5fc3<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.wsisp.com\/helps\/65066.html\" \/>\n<meta property=\"og:locale\" content=\"zh_CN\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"\u4e94\u7ea7\u6d41\u6c34\u7ebf RISC-V CPU \u8bbe\u8ba1\u4e0e\u5b9e\u73b0\u8be6\u89e3 - \u7f51\u7855\u4e92\u8054\u5e2e\u52a9\u4e2d\u5fc3\" \/>\n<meta property=\"og:description\" content=\"\u4e00\u3001\u8bbe\u8ba1\u6982\u8ff0 \u8fd9\u662f\u4e00\u4e2a\u5b8c\u6574\u7684\u4e94\u7ea7\u6d41\u6c34\u7ebf RISC-V CPU \u5b9e\u73b0&#xff0c;\u91c7\u7528\u7ecf\u5178\u7684\u54c8\u4f5b\u67b6\u6784&#xff0c;\u652f\u6301 RISC-V \u57fa\u7840\u6307\u4ee4\u96c6\u3002\u8bbe\u8ba1\u5b9e\u73b0\u4e86\u4ece\u53d6\u6307\u4ee4\u5230\u5199\u56de\u7684\u5b8c\u6574\u6d41\u6c34\u7ebf&#xff0c;\u5305\u542b\u4e86\u5192\u9669\u5904\u7406\u673a\u5236&#xff0c;\u662f\u4e00\u4e2a\u6559\u5b66\u7ea7\u7684 CPU \u8bbe\u8ba1\u8303\u4f8b\u3002 \u4e8c\u3001\u6d41\u6c34\u7ebf\u67b6\u6784 2.1 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