{"id":55180,"date":"2025-08-13T18:29:24","date_gmt":"2025-08-13T10:29:24","guid":{"rendered":"https:\/\/www.wsisp.com\/helps\/55180.html"},"modified":"2025-08-13T18:29:24","modified_gmt":"2025-08-13T10:29:24","slug":"%e7%b4%ab%e5%85%89%e5%90%8c%e5%88%9blogos2rk3568jhf%e5%bc%80%e5%8f%91%e6%9d%bf%ef%bc%9a%e5%9b%bd%e4%ba%a7%e5%bc%82%e6%9e%84%e8%ae%a1%e7%ae%97%e5%b9%b3%e5%8f%b0%e7%9a%84%e7%a0%b4%e5%b1%80%e8%80%85","status":"publish","type":"post","link":"https:\/\/www.wsisp.com\/helps\/55180.html","title":{"rendered":"\u7d2b\u5149\u540c\u521bLogos2+RK3568JHF\u5f00\u53d1\u677f\uff1a\u56fd\u4ea7\u5f02\u6784\u8ba1\u7b97\u5e73\u53f0\u7684\u7834\u5c40\u8005"},"content":{"rendered":"<h2>\u4e00\u3001\u786c\u6838\u642d\u6863&#xff1a;\u5f53ARM\u9047\u4e0aFPGA<\/h2>\n<p>\u5728\u5d4c\u5165\u5f0f\u5f00\u53d1\u9886\u57df&#xff0c;\u6211\u4eec\u5e38\u5e38\u9762\u4e34\u4e00\u4e2a\u4e24\u96be\u9009\u62e9&#xff1a;\u662f\u8981CPU\u7684\u7075\u6d3b\u53ef\u7f16\u7a0b\u6027&#xff0c;\u8fd8\u662f\u8981FPGA\u7684\u5b9e\u65f6\u786e\u5b9a\u6027&#xff1f;RK3568JHF\u5f00\u53d1\u677f\u7ed9\u51fa\u7684\u7b54\u6848\u662f&#xff1a;\u5168\u90fd\u8981&#xff01;<\/p>\n<p>\u8fd9\u6b3e\u5f00\u53d1\u677f\u7684\u7075\u9b42\u5728\u4e8e\u5b83\u7684&#034;\u53cc\u82af&#034;\u67b6\u6784&#xff1a;<\/p>\n<ul>\n<li>\n<p>\u667a\u6167\u5927\u8111RK3568&#xff1a;\u56db\u6838Cortex-A55\u5904\u7406\u5668\u5c31\u50cf\u4e00\u4f4d\u7ecf\u9a8c\u4e30\u5bcc\u7684\u6307\u6325\u5b98&#xff0c;\u8d1f\u8d23\u8fd0\u884cLinux\/HarmonyOS\u7b49\u590d\u6742\u7cfb\u7edf&#xff0c;\u5904\u7406\u4e0a\u5c42\u4e1a\u52a1\u903b\u8f91\u3002<\/p>\n<\/li>\n<\/ul>\n<ul>\n<li>\n<p>\u95ea\u7535\u5feb\u624bPG2L50H FPGA&#xff1a;\u8fd9\u4f4d&#034;\u7279\u79cd\u5175&#034;\u62e5\u670953,700\u4e2a\u903b\u8f91\u5355\u5143\u548c71,600\u4e2a\u89e6\u53d1\u5668&#xff0c;\u4e13\u653b\u90a3\u4e9b\u9700\u8981\u7eb3\u79d2\u7ea7\u54cd\u5e94\u7684\u4efb\u52a1\u3002<\/p>\n<\/li>\n<\/ul>\n<p>\u5b83\u4eec\u4e4b\u95f4\u7684\u9ad8\u901f\u901a\u9053&#xff08;PCIe 2.0\u3001FSPI&#xff09;\u5c31\u50cf\u7279\u6218\u961f\u7684\u52a0\u5bc6\u901a\u8baf\u7cfb\u7edf&#xff0c;\u8ba9\u6570\u636e\u80fd\u4ee5780MB\/s\u7684\u901f\u5ea6\u98de\u5954\u3002\u60f3\u8c61\u4e00\u4e0b&#xff0c;\u8fd9\u76f8\u5f53\u4e8e\u6bcf\u79d2\u949f\u4f20\u8f93\u5b8c\u4e00\u6574\u90e8\u9ad8\u6e05\u7535\u5f71\u7684\u6570\u636e\u91cf&#xff01;<\/p>\n<h2><\/h2>\n<h2>\u4e8c\u3001\u5b9e\u6218\u573a\u666f&#xff1a;\u8ba9\u673a\u5668\u62e5\u6709&#034;\u8d85\u80fd\u529b&#034;<\/h2>\n<h4>1.\u5de5\u4e1a\u81ea\u52a8\u5316&#xff1a;\u7cbe\u51c6\u5230\u5fae\u7c73\u7684\u821e\u8e48 \u5728\u667a\u80fd\u5de5\u5382\u91cc&#xff0c;\u6211\u4eec\u7684\u5f00\u53d1\u677f\u6b63\u5728\u6307\u6325\u4e00\u652f\u673a\u68b0\u81c2\u82ad\u857e&#xff1a;<\/h4>\n<ul>\n<li>\n<p>FPGA\u4ee51MHz\u7684\u9891\u7387\u8bfb\u53d616\u4e2a\u7f16\u7801\u5668\u4fe1\u53f7&#xff08;\u6bd4\u4eba\u7c7b\u7728\u773c\u5feb1000\u500d&#xff09;<\/p>\n<\/li>\n<li>\n<p>ARM\u6838\u5fc3\u5b9e\u65f6\u8ba1\u7b97\u8fd0\u52a8\u8f68\u8ff9&#xff0c;\u786e\u4fdd\u6bcf\u4e2a\u52a8\u4f5c\u8bef\u5dee\u4e0d\u8d85\u8fc70.01mm<\/p>\n<\/li>\n<li>\n<p>\u5f53\u7a81\u53d1\u505c\u7535\u65f6&#xff0c;RTC\u5b9e\u65f6\u65f6\u949f\u548c\u4f4e\u529f\u8017\u8bbe\u8ba1\u8ba9\u7cfb\u7edf\u80fd&#034;\u8bb0\u4f4f&#034;\u6700\u540e\u4e00\u523b\u7684\u72b6\u6001<\/p>\n<\/li>\n<\/ul>\n<h4>2.\u667a\u80fd\u5b89\u9632&#xff1a;\u6c38\u4e0d\u75b2\u5026\u7684\u54e8\u5175 \u6df1\u591c\u7684\u76d1\u63a7\u5ba4\u91cc&#xff0c;\u5f00\u53d1\u677f\u6b63\u5728\u4e0a\u6f14\u73b0\u5b9e\u7248\u7684&#034;\u9e70\u773c&#034;&#xff1a;<\/h4>\n<ul>\n<li>\n<p>FPGA\u540c\u65f6\u5904\u74064\u8def4K\u89c6\u9891\u6d41&#xff0c;\u81ea\u52a8\u805a\u7126\u53ef\u7591\u533a\u57df<\/p>\n<\/li>\n<li>\n<p>NPU\u572820ms\u5185\u5b8c\u6210\u4eba\u8138\u6bd4\u5bf9&#xff08;\u6bd4\u4fdd\u5b89\u53cd\u5e94\u5feb10\u500d&#xff09;<\/p>\n<\/li>\n<li>\n<p>\u5f53\u53d1\u73b0\u5f02\u5e38\u65f6&#xff0c;CAN\u603b\u7ebf\u7acb\u5373\u89e6\u53d1\u62a5\u8b66\u7cfb\u7edf<\/p>\n<\/li>\n<\/ul>\n<h4>3.\u533b\u7597\u8bbe\u5907&#xff1a;\u4e0e\u751f\u547d\u8d5b\u8dd1 \u5728ICU\u75c5\u623f&#xff0c;\u8fd9\u5957\u7cfb\u7edf\u6b63\u5728\u521b\u9020\u751f\u547d\u5947\u8ff9&#xff1a;<\/h4>\n<ul>\n<li>\n<p>FPGA\u4ee5\u533b\u7597\u7ea7\u7cbe\u5ea6\u91c7\u96c6ECG\u4fe1\u53f7&#xff0c;\u8fc7\u6ee4\u6389\u6240\u6709\u5e72\u6270<\/p>\n<\/li>\n<li>\n<p>ARM\u8fd0\u884cAI\u7b97\u6cd5&#xff0c;\u57285ms\u5185\u8bc6\u522b\u51fa\u5371\u9669\u7684\u5fc3\u5f8b\u5931\u5e38<\/p>\n<\/li>\n<li>\n<p>\u901a\u8fc7MIPI\u63a5\u53e3\u5c06\u5173\u952e\u6570\u636e\u6295\u5c04\u5230\u624b\u672f\u5ba4\u5927\u5c4f<\/p>\n<\/li>\n<\/ul>\n<h2>\u4e09\u3001\u5f00\u53d1\u8005\u624b\u8bb0&#xff1a;\u4ece\u5165\u95e8\u5230\u7cbe\u901a<\/h2>\n<h4>\u5f00\u53d1\u73af\u5883\u642d\u5efa&#xff08;5\u5206\u949f\u6781\u901f\u5165\u95e8&#xff09;<\/h4>\n<p>bash<\/p>\n<p># \u5b89\u88c5ARM\u5de5\u5177\u94fe&#xff08;\u5c31\u50cf\u7ed9\u5f00\u53d1\u677f\u914d\u7ffb\u8bd1\u5b98&#xff09;sudo apt install gcc-aarch64-linux-gnu<\/p>\n<p># \u83b7\u53d6\u7d2b\u5149FPGA\u5de5\u5177&#xff08;\u56fd\u4ea7EDA\u7684\u94a5\u5319&#xff09;<br \/>\ntar -xvf pds_2023.1_linux.tar.gz<\/p>\n<h4>PCIe\u6570\u636e\u4f20\u8f93\u5b9e\u6218 \u60f3\u8c61\u4f60\u662f\u4e00\u4f4d\u6570\u636e\u5feb\u9012\u5458&#xff1a;<\/h4>\n<p>c<\/p>\n<p>\/\/ ARM\u7aef&#xff1a;\u6253\u5305\u6570\u636e\u5305\u88f9struct dma_package {void* source;  \/\/ \u53d1\u8d27\u5730\u5740void* destination; \/\/ \u6536\u8d27\u5730\u5740size_t size;   \/\/ \u5305\u88f9\u5927\u5c0f<br \/>\n};<br \/>\n\/\/ \u547c\u53ebDMA\u5feb\u9012\u5c0f\u54e5<br \/>\nioctl(fd, DMA_START, &amp;package);<\/p>\n<h4>FPGA\u7aef\u5219\u662f\u4e00\u4e2a\u667a\u80fd\u5206\u62e3\u4e2d\u5fc3&#xff1a;<\/h4>\n<p>verilog<\/p>\n<p>module data_center (<br \/>\n    input wire pcie_clk,  \/\/ \u5feb\u9012\u8f66\u7684\u5f15\u64ceoutput reg [63:0] box \/\/ \u4f20\u9001\u5e26\u4e0a\u7684\u5305\u88f9<br \/>\n);<br \/>\n\/\/ \u8fd9\u91cc\u662f\u7528Verilog\u5199\u7684\u81ea\u52a8\u5206\u62e3\u7cfb\u7edfendmodule<\/p>\n<h4>\u6027\u80fd\u4f18\u5316\u5c0f\u8d34\u58eb<\/h4>\n<ul>\n<li>\n<p>\u9047\u5230PCIe\u4fe1\u53f7\u4e0d\u7a33&#xff1f;\u68c0\u67e5PCB\u5e03\u7ebf\u662f\u5426\u50cf\u9ad8\u901f\u516c\u8def\u4e00\u6837\u7b14\u76f4&#xff08;\u963b\u629785\u03a9&#xff09;<\/p>\n<\/li>\n<li>\n<p>FPGA\u65f6\u5e8f\u8fdd\u4f8b&#xff1f;\u7528PDS\u5de5\u5177\u7684\u65f6\u5e8f\u7ea6\u675f\u7f16\u8f91\u5668&#034;\u9a6f\u670d&#034;\u65f6\u949f<\/p>\n<\/li>\n<li>\n<p>\u60f3\u69a8\u5e72\u6027\u80fd&#xff1f;DMA&#043;\u53cc\u7f13\u51b2\u5c31\u50cf\u7ec4\u5efa\u4e00\u652f\u7279\u79cd\u8fd0\u8f93\u961f<\/p>\n<\/li>\n<\/ul>\n<h2><\/h2>\n<h2>\u56db\u3001\u6570\u5b57\u4f1a\u8bf4\u8bdd&#xff1a;\u6027\u80fd\u5bf9\u6bd4<\/h2>\n<p>\u6211\u4eec\u505a\u4e86\u4e2a\u6709\u8da3\u7684\u5b9e\u9a8c&#xff1a;<\/p>\n<table>\n<tbody>\n<tr>\n<td>\u4efb\u52a1\u7c7b\u578b<\/td>\n<td>\u7eafARM\u65b9\u6848<\/td>\n<td>ARM&#043;FPGA\u65b9\u6848<\/td>\n<td>\u63d0\u5347\u6548\u679c<\/td>\n<\/tr>\n<tr>\n<td>\u97f3\u9891\u964d\u566a\u5904\u7406<\/td>\n<td>\u8017\u65f615ms<\/td>\n<td>\u4ec52ms<\/td>\n<td>\u5feb7.5\u500d<\/td>\n<\/tr>\n<tr>\n<td>\u5343\u5146\u7f51\u6570\u636e\u8fc7\u6ee4<\/td>\n<td>600Mbps<\/td>\n<td>\u7ebf\u901f\u8f6c\u53d1<\/td>\n<td>\u96f6CPU\u5360\u7528<\/td>\n<\/tr>\n<tr>\n<td>\u591a\u4f20\u611f\u5668\u91c7\u96c6<\/td>\n<td>8\u901a\u9053<\/td>\n<td>32\u901a\u9053<\/td>\n<td>\u591a4\u500d\u5bb9\u91cf<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<h2><\/h2>\n<h2>\u4e94\u3001\u7ed9\u5f00\u53d1\u8005\u7684\u6696\u5fc3\u5efa\u8bae<\/h2>\n<p>\u8c03\u8bd5\u5c31\u50cf\u7834\u6848&#xff1a;\u7528i2c-tools\u5f53\u4f60\u7684&#034;\u4fa6\u63a2\u5de5\u5177\u5305&#034;<\/p>\n<p>FPGA\u70e7\u5f55\u5fc5\u770b&#xff1a;JTAG\u63a5\u53e3\u5c31\u50cfFPGA\u7684&#034;\u751f\u547d\u7ebf&#034;<\/p>\n<p>\u907f\u5751\u6307\u5357&#xff1a;<\/p>\n<p>\u00a0 \u00a0 \u00a0 \u00a0PCIe\u94fe\u8def\u4e0d\u7a33\u5b9a&#xff1f;\u53ef\u80fd\u662f\u4fe1\u53f7\u7ebf\u5728&#034;\u8df3\u79e7\u6b4c&#034;<\/p>\n<p>\u00a0 \u00a0 \u00a0 \u00a0\u529f\u8017\u5f02\u5e38&#xff1f;\u68c0\u67e5FPGA\u662f\u5426\u5728&#034;\u71ac\u591c\u52a0\u73ed&#034;<\/p>\n<\/p>\n<h2>\u7ed3\u8bed&#xff1a;\u672a\u6765\u5df2\u6765<\/h2>\n<p>\u8fd9\u6b3e\u5f00\u53d1\u677f\u6700\u8ff7\u4eba\u7684\u5730\u65b9\u5728\u4e8e&#xff0c;\u5b83\u8ba9\u66fe\u7ecf\u9700\u8981\u6602\u8d35\u8fdb\u53e3\u65b9\u6848\u624d\u80fd\u5b9e\u73b0\u7684\u529f\u80fd&#xff0c;\u73b0\u5728\u7528\u56fd\u4ea7\u82af\u7247\u5c31\u80fd\u8f7b\u677e\u641e\u5b9a\u3002\u65e0\u8bba\u662f\u60f3\u6253\u9020\u667a\u80fd\u5de5\u5382\u7684&#034;\u6700\u5f3a\u5927\u8111&#034;&#xff0c;\u8fd8\u662f\u5f00\u53d1\u4e0b\u4e00\u4ee3\u533b\u7597\u8bbe\u5907&#xff0c;\u8fd9\u4e2a\u5e73\u53f0\u90fd\u50cf\u4e50\u9ad8\u79ef\u6728\u4e00\u6837&#xff0c;\u8ba9\u521b\u610f\u53ef\u4ee5\u5feb\u901f\u53d8\u6210\u73b0\u5b9e\u3002<\/p><\/p>\n","protected":false},"excerpt":{"rendered":"<p>\u6587\u7ae0\u6d4f\u89c8\u9605\u8bfb503\u6b21\uff0c\u70b9\u8d5e13\u6b21\uff0c\u6536\u85cf5\u6b21\u3002\u8fd9\u6b3e\u5f00\u53d1\u677f\u6700\u8ff7\u4eba\u7684\u5730\u65b9\u5728\u4e8e\uff0c\u5b83\u8ba9\u66fe\u7ecf\u9700\u8981\u6602\u8d35\u8fdb\u53e3\u65b9\u6848\u624d\u80fd\u5b9e\u73b0\u7684\u529f\u80fd\uff0c\u73b0\u5728\u7528\u56fd\u4ea7\u82af\u7247\u5c31\u80fd\u8f7b\u677e\u641e\u5b9a\u3002\u65e0\u8bba\u662f\u60f3\u6253\u9020\u667a\u80fd\u5de5\u5382\u7684&quot;\u6700\u5f3a\u5927\u8111&quot;\uff0c\u8fd8\u662f\u5f00\u53d1\u4e0b\u4e00\u4ee3\u533b\u7597\u8bbe\u5907\uff0c\u8fd9\u4e2a\u5e73\u53f0\u90fd\u50cf\u4e50\u9ad8\u79ef\u6728\u4e00\u6837\uff0c\u8ba9\u521b\u610f\u53ef\u4ee5\u5feb\u901f\u53d8\u6210\u73b0\u5b9e\u3002<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[941,269,2303,492],"topic":[],"class_list":["post-55180","post","type-post","status-publish","format-standard","hentry","category-server","tag-fpga","tag-269","tag-2303","tag-492"],"yoast_head":"<!-- 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