{"id":52393,"date":"2025-08-11T13:54:22","date_gmt":"2025-08-11T05:54:22","guid":{"rendered":"https:\/\/www.wsisp.com\/helps\/52393.html"},"modified":"2025-08-11T13:54:22","modified_gmt":"2025-08-11T05:54:22","slug":"%e5%9f%ba%e4%ba%8e-stm32-%e4%b8%8elvgl%ef%bc%8c-7%e5%af%b8qspi-%e5%b1%8f%e7%9a%84%e6%97%a0%e4%ba%ba%e6%9c%ba-mfd-%e4%bb%aa%e8%a1%a8%e6%96%b9%e6%a1%88%e5%ae%9e%e8%b7%b5","status":"publish","type":"post","link":"https:\/\/www.wsisp.com\/helps\/52393.html","title":{"rendered":"\u57fa\u4e8e STM32 \u4e0eLVGL\uff0c 7\u5bf8QSPI \u5c4f\u7684\u65e0\u4eba\u673a MFD \u4eea\u8868\u65b9\u6848\u5b9e\u8df5"},"content":{"rendered":"

\u76ee\u5f55<\/h2>\n
  • \u5f15\u8a00<\/li>\n
  • \u9879\u76ee\u6982\u8ff0<\/li>\n
  • \u786c\u4ef6\u9009\u578b\u4e0e\u8bbe\u8ba1<\/li>\n
  • \u5f00\u53d1\u73af\u5883\u642d\u5efa<\/li>\n
  • \u754c\u9762\u8bbe\u8ba1\u4e0e\u5b9e\u73b0<\/li>\n
  • \u6838\u5fc3\u529f\u80fd\u5f00\u53d1<\/li>\n
  • \u7cfb\u7edf\u96c6\u6210\u4e0e\u4e3b\u7a0b\u5e8f<\/li>\n
  • \u6d4b\u8bd5\u4e0e\u8c03\u8bd5<\/li>\n
  • \u603b\u7ed3\u4e0e\u5c55\u671b<\/li>\n

    \u5f15\u8a00<\/h3>\n

    \u65e0\u4eba\u673a\u5730\u9762\u591a\u529f\u80fd\u663e\u793a\u5668（MFD）\u662f\u98de\u884c\u63a7\u5236\u7684\u6838\u5fc3\u4ea4\u4e92\u8bbe\u5907，\u9700\u5b9e\u65f6\u5448\u73b0\u5173\u952e\u98de\u884c\u53c2\u6570\u5e76\u652f\u6301\u5feb\u901f\u64cd\u4f5c\u3002\u672c\u65b9\u6848\u91c7\u7528 STM32 \u5fae\u5904\u7406\u5668\u76f4\u63a5\u901a\u8fc7 QSPI \u63a5\u53e3\u9a71\u52a8 7 \u5bf8\u6db2\u6676\u5c4f，\u96c6\u6210 CAN FD \u603b\u7ebf\u5b9e\u73b0\u4e0e\u65e0\u4eba\u673a\u98de\u63a7\u7cfb\u7edf\u7684\u9ad8\u901f\u6570\u636e\u4ea4\u4e92，\u901a\u8fc7\u7269\u7406\u6309\u952e\u5b8c\u6210\u64cd\u4f5c，\u4e13\u6ce8\u4e8e\u65e0\u4eba\u673a\u4e13\u7528\u53c2\u6570\u663e\u793a（\u5269\u4f59\u7535\u91cf\u3001\u7535\u673a\u8f6c\u901f\u3001\u60ac\u505c\u9ad8\u5ea6\u7b49），\u517c\u987e\u53ef\u9760\u6027\u4e0e\u5b9e\u65f6\u6027\u3002<\/p>\n

    \u9879\u76ee\u6982\u8ff0<\/h3>\n

    \u6838\u5fc3\u76ee\u6807<\/h4>\n
  • \u786c\u4ef6\u67b6\u6784：STM32 \u901a\u8fc7 QSPI \u63a5\u53e3\u76f4\u63a5\u9a71\u52a8 7 \u5bf8 800*480 \u6db2\u6676\u5c4f，\u7701\u53bb RGB \u8f6c\u6362\u73af\u8282，\u7b80\u5316\u7535\u8def\u3002<\/li>\n
  • \u6570\u636e\u4ea4\u4e92：\u901a\u8fc7 CAN FD \u603b\u7ebf\u63a5\u6536\u65e0\u4eba\u673a\u98de\u63a7\u6570\u636e（\u4f20\u8f93\u901f\u7387\u6700\u9ad8 8Mbps），\u6ee1\u8db3\u9ad8\u901f\u6570\u636e\u9700\u6c42\u3002<\/li>\n
  • \u663e\u793a\u529f\u80fd：\u5b9e\u73b0\u65e0\u4eba\u673a\u5269\u4f59\u7535\u91cf\u30014 \u8def\u7535\u673a\u8f6c\u901f\u3001\u60ac\u505c\u9ad8\u5ea6\u3001\u98de\u884c\u6a21\u5f0f\u3001GPS \u72b6\u6001\u7b49\u6838\u5fc3\u53c2\u6570\u7684\u53ef\u89c6\u5316\u663e\u793a\u3002<\/li>\n
  • \u64cd\u4f5c\u65b9\u5f0f：\u901a\u8fc7 3-5 \u4e2a\u7269\u7406\u529f\u80fd\u6309\u952e\u5b8c\u6210\u754c\u9762\u5207\u6362\u3001\u53c2\u6570\u8bbe\u7f6e\u3001\u7d27\u6025\u64cd\u4f5c\u7b49\u529f\u80fd\u3002<\/li>\n
  • \u6027\u80fd\u6307\u6807：\u6570\u636e\u5237\u65b0\u7387\u226510Hz，\u754c\u9762\u54cd\u5e94\u65f6\u95f4\u2264100ms，\u8fde\u7eed\u8fd0\u884c\u65e0\u6545\u969c\u65f6\u95f4\u22651000 \u5c0f\u65f6\u3002<\/li>\n

    \u786c\u4ef6\u9009\u578b\u4e0e\u8bbe\u8ba1<\/h3>\n

    \u6838\u5fc3\u63a7\u5236\u5668\u9009\u578b<\/h4>\n

    \u9009\u7528STM32H743VIT6\u4f5c\u4e3a\u4e3b\u63a7\u5236\u5668，\u5173\u952e\u53c2\u6570：<\/p>\n\n\u53c2\u6570\u89c4\u683c\u9002\u914d\u4f18\u52bf<\/tr>\n\n\n\n\n\n
    \u5185\u6838<\/td>\nARM Cortex-M7，\u4e3b\u9891 400MHz<\/td>\n\u9ad8\u6027\u80fd\u5904\u7406\u80fd\u529b，\u652f\u6301\u590d\u6742\u56fe\u5f62\u6e32\u67d3\u4e0e CAN FD \u5b9e\u65f6\u5904\u7406<\/td>\n<\/tr>\n
    \u5916\u8bbe<\/td>\n2x QSPI \u63a5\u53e3（\u652f\u6301 800*480 \u5c4f\u9a71\u52a8）\u30012x CAN FD \u63a7\u5236\u5668<\/td>\n\u539f\u751f QSPI \u4e0e CAN FD \u5916\u8bbe，\u65e0\u9700\u989d\u5916\u6269\u5c55<\/td>\n<\/tr>\n
    \u5185\u5b58<\/td>\n1MB SRAM\u30012MB Flash<\/td>\n\u6ee1\u8db3 LVGL \u56fe\u5f62\u7f13\u5b58（800*480@16bit \u9700\u7ea6 768KB）\u4e0e\u7a0b\u5e8f\u5b58\u50a8<\/td>\n<\/tr>\n
    \u5de5\u4f5c\u6e29\u5ea6<\/td>\n-40\u2103~85\u2103<\/td>\n\u9002\u5e94\u65e0\u4eba\u673a\u6237\u5916\u4f5c\u4e1a\u73af\u5883<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

    \u663e\u793a\u8bbe\u5907\u9009\u578b<\/h4>\n

    7 \u5bf8 800*480 QSPI \u63a5\u53e3\u6db2\u6676\u5c4f\u53c2\u6570：<\/p>\n\n\u53c2\u6570\u89c4\u683c\u7279\u6027<\/tr>\n\n\n\n\n\n\n\n
    \u5c3a\u5bf8<\/td>\n7 \u82f1\u5bf8<\/td>\n\u5e73\u8861\u663e\u793a\u9762\u79ef\u4e0e\u4fbf\u643a\u6027<\/td>\n<\/tr>\n
    \u5206\u8fa8\u7387<\/td>\n800*480（4:3）<\/td>\n\u9002\u5408\u591a\u53c2\u6570\u5206\u533a\u663e\u793a<\/td>\n<\/tr>\n
    \u63a5\u53e3<\/td>\nQSPI（4 \u7ebf\u6a21\u5f0f，\u652f\u6301\u53cc\u5411\u6570\u636e\u4f20\u8f93）<\/td>\n\u76f4\u63a5\u4e0e STM32 QSPI \u5916\u8bbe\u8fde\u63a5，\u4f20\u8f93\u901f\u7387\u6700\u9ad8 80MHz<\/td>\n<\/tr>\n
    \u4eae\u5ea6<\/td>\n400cd\/m\u00b2<\/td>\n\u6237\u5916\u9633\u5149\u4e0b\u53ef\u89c6<\/td>\n<\/tr>\n
    \u80cc\u5149<\/td>\nLED（\u652f\u6301 PWM \u4eae\u5ea6\u8c03\u8282）<\/td>\n\u53ef\u901a\u8fc7 STM32 GPIO \u63a7\u5236\u529f\u8017<\/td>\n<\/tr>\n
    \u5de5\u4f5c\u7535\u538b<\/td>\n3.3V<\/td>\n\u4e0e STM32 \u4f9b\u7535\u517c\u5bb9<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

    \u5173\u952e\u5916\u8bbe\u6a21\u5757<\/h4>\n
  • \n

    CAN FD \u6536\u53d1\u5668：<\/p>\n

      \n
    • \u578b\u53f7：TJA1044（\u652f\u6301 CAN FD，\u6700\u9ad8 8Mbps）<\/li>\n
    • \u529f\u80fd：\u5c06 STM32 \u7684 CAN FD \u4fe1\u53f7\u8f6c\u6362\u4e3a\u5dee\u5206\u4fe1\u53f7，\u4e0e\u65e0\u4eba\u673a\u98de\u63a7 CAN \u603b\u7ebf\u8fde\u63a5\u3002<\/li>\n<\/ul>\n<\/li>\n
    • \n

      \u529f\u80fd\u6309\u952e：<\/p>\n

        \n
      • \u6570\u91cf：5 \u4e2a（\u7535\u6e90\u952e\u3001\u83dc\u5355\u952e\u3001\u4e0a \/ \u4e0b\u9009\u62e9\u952e\u3001\u786e\u8ba4\u952e）<\/li>\n
      • \u7c7b\u578b：\u8f7b\u89e6\u6309\u952e（\u5e26\u786c\u4ef6\u6d88\u6296），\u4e0b\u62c9\u8f93\u5165\u6a21\u5f0f\u3002<\/li>\n<\/ul>\n<\/li>\n
      • \n

        \u7535\u6e90\u6a21\u5757：<\/p>\n

          \n
        • \u8f93\u5165：DC 12V（\u65e0\u4eba\u673a\u4f9b\u7535\u7cfb\u7edf\u5e38\u89c1\u7535\u538b）<\/li>\n
        • \u8f93\u51fa：3.3V\/2A（\u7ed9 STM32\u3001\u6db2\u6676\u5c4f\u4f9b\u7535），5V\/1A（\u5907\u7528）\u3002<\/li>\n<\/ul>\n<\/li>\n

          \u786c\u4ef6\u8fde\u63a5\u8bbe\u8ba1<\/h4>\n

          1. STM32 \u4e0e QSPI \u6db2\u6676\u5c4f\u8fde\u63a5<\/h5>\n\nSTM32 \u5f15\u811a\u529f\u80fd\u6db2\u6676\u5c4f\u5f15\u811a\u8bf4\u660e<\/tr>\n\n\n\n\n\n\n\n\n\n\n\n
          PB2（QSPI_CLK）<\/td>\n\u65f6\u949f\u7ebf<\/td>\nCLK<\/td>\nQSPI \u65f6\u949f\u4fe1\u53f7（\u6700\u9ad8 80MHz）<\/td>\n<\/tr>\n
          PD11（QSPI_NCS）<\/td>\n\u7247\u9009<\/td>\nCS<\/td>\n\u4f4e\u7535\u5e73\u6709\u6548，\u9009\u4e2d\u6db2\u6676\u5c4f<\/td>\n<\/tr>\n
          PF8（QSPI_D0）<\/td>\n\u6570\u636e\u8f93\u5165<\/td>\nD0<\/td>\n\u4e3b\u673a\u63a5\u6536 \/ \u4ece\u673a\u53d1\u9001\u6570\u636e<\/td>\n<\/tr>\n
          PF9（QSPI_D1）<\/td>\n\u6570\u636e\u8f93\u51fa<\/td>\nD1<\/td>\n\u4e3b\u673a\u53d1\u9001 \/ \u4ece\u673a\u63a5\u6536\u6570\u636e<\/td>\n<\/tr>\n
          PF10（QSPI_D2）<\/td>\n\u6570\u636e\u8f93\u5165 2<\/td>\nD2<\/td>\n\u53ef\u9009，4 \u7ebf\u6a21\u5f0f\u589e\u5f3a\u4f20\u8f93（\u672c\u65b9\u6848\u542f\u7528）<\/td>\n<\/tr>\n
          PG12（QSPI_D3）<\/td>\n\u6570\u636e\u8f93\u51fa 2<\/td>\nD3<\/td>\n\u53ef\u9009，4 \u7ebf\u6a21\u5f0f\u589e\u5f3a\u4f20\u8f93（\u672c\u65b9\u6848\u542f\u7528）<\/td>\n<\/tr>\n
          PA0<\/td>\n\u590d\u4f4d<\/td>\nRST<\/td>\n\u4f4e\u7535\u5e73\u590d\u4f4d\u6db2\u6676\u5c4f（\u9ed8\u8ba4\u4e0a\u62c9）<\/td>\n<\/tr>\n
          PA1<\/td>\n\u80cc\u5149\u63a7\u5236<\/td>\nBL<\/td>\nPWM \u8f93\u51fa\u8c03\u8282\u4eae\u5ea6（\u9ad8\u7535\u5e73\u4f7f\u80fd）<\/td>\n<\/tr>\n
          3.3V<\/td>\n\u7535\u6e90<\/td>\nVCC<\/td>\n\u6db2\u6676\u5c4f\u4f9b\u7535<\/td>\n<\/tr>\n
          GND<\/td>\n\u63a5\u5730<\/td>\nGND<\/td>\n\u5171\u5730\u8fde\u63a5<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
          2. STM32 \u4e0e CAN FD \u603b\u7ebf\u8fde\u63a5<\/h5>\n\nSTM32 \u5f15\u811a\u529f\u80fdTJA1044 \u5f15\u811a\u8bf4\u660e<\/tr>\n\n\n\n\n\n\n
          PD0（CAN1_RX）<\/td>\n\u63a5\u6536\u6570\u636e<\/td>\nRXD<\/td>\nCAN FD \u63a5\u6536\u4fe1\u53f7<\/td>\n<\/tr>\n
          PD1（CAN1_TX）<\/td>\n\u53d1\u9001\u6570\u636e<\/td>\nTXD<\/td>\nCAN FD \u53d1\u9001\u4fe1\u53f7<\/td>\n<\/tr>\n
          3.3V<\/td>\n\u7535\u6e90<\/td>\nVCC<\/td>\n\u6536\u53d1\u5668\u4f9b\u7535<\/td>\n<\/tr>\n
          GND<\/td>\n\u63a5\u5730<\/td>\nGND<\/td>\n\u5171\u5730\u8fde\u63a5<\/td>\n<\/tr>\n
          –<\/td>\n\u603b\u7ebf\u63a5\u53e3<\/td>\nCAN_H\/CAN_L<\/td>\n\u8fde\u63a5\u81f3\u65e0\u4eba\u673a\u98de\u63a7 CAN \u603b\u7ebf<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
          3. \u529f\u80fd\u6309\u952e\u8fde\u63a5<\/h5>\n\n\u6309\u952e\u529f\u80fdSTM32 \u5f15\u811a\u7535\u8def\u8bbe\u8ba1<\/tr>\n\n\n\n\n\n\n
          \u7535\u6e90\u952e<\/td>\nPC0<\/td>\n\u4e0b\u62c9\u8f93\u5165，\u6309\u4e0b\u63a5 3.3V<\/td>\n<\/tr>\n
          \u83dc\u5355\u952e<\/td>\nPC1<\/td>\n\u4e0b\u62c9\u8f93\u5165，\u6309\u4e0b\u63a5 3.3V<\/td>\n<\/tr>\n
          \u4e0a\u9009\u62e9\u952e<\/td>\nPC2<\/td>\n\u4e0b\u62c9\u8f93\u5165，\u6309\u4e0b\u63a5 3.3V<\/td>\n<\/tr>\n
          \u4e0b\u9009\u62e9\u952e<\/td>\nPC3<\/td>\n\u4e0b\u62c9\u8f93\u5165，\u6309\u4e0b\u63a5 3.3V<\/td>\n<\/tr>\n
          \u786e\u8ba4\u952e<\/td>\nPC4<\/td>\n\u4e0b\u62c9\u8f93\u5165，\u6309\u4e0b\u63a5 3.3V<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

          \u5f00\u53d1\u73af\u5883\u642d\u5efa<\/h3>\n

          \u6838\u5fc3\u5de5\u5177<\/h4>\n\n\u5de5\u5177\u540d\u79f0\u7248\u672c\u7528\u9014<\/tr>\n\n\n\n\n\n\n
          STM32CubeIDE<\/td>\n1.14.0<\/td>\n\u4ee3\u7801\u5f00\u53d1\u3001\u7f16\u8bd1\u3001\u8c03\u8bd5\u4e00\u4f53\u5316\u73af\u5883<\/td>\n<\/tr>\n
          STM32CubeMX<\/td>\n6.10.0<\/td>\n\u5916\u8bbe\u914d\u7f6e（QSPI\u3001CAN FD\u3001GPIO \u7b49）<\/td>\n<\/tr>\n
          LVGL<\/td>\nv8.3<\/td>\n\u5d4c\u5165\u5f0f\u56fe\u5f62\u5e93，\u9002\u914d 800*480 \u5206\u8fa8\u7387<\/td>\n<\/tr>\n
          CANoe<\/td>\n11.0<\/td>\nCAN FD \u603b\u7ebf\u6570\u636e\u4eff\u771f\u4e0e\u6d4b\u8bd5<\/td>\n<\/tr>\n
          ST-Link V3<\/td>\n–<\/td>\n\u7a0b\u5e8f\u4e0b\u8f7d\u4e0e\u786c\u4ef6\u8c03\u8bd5<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

          \u73af\u5883\u914d\u7f6e\u6b65\u9aa4<\/h4>\n

          1. STM32CubeMX \u914d\u7f6e<\/h5>\n
        • \n

          \u9009\u62e9\u82af\u7247 \u201cSTM32H743VITx\u201d，\u914d\u7f6e\u6838\u5fc3\u5916\u8bbe：<\/p>\n

            \n
          • QSPI：\u6a21\u5f0f \u201cMemory-mapped\u201d，\u65f6\u949f 80MHz，\u6570\u636e\u5bbd\u5ea6 4 \u7ebf（D0-D3）\u3002<\/li>\n
          • CAN FD：\u6ce2\u7279\u7387 \u201c500kbps（\u4ef2\u88c1\u6bb5）+8Mbps（\u6570\u636e\u6bb5）\u201d，\u4f7f\u80fd\u4e2d\u65ad\u3002<\/li>\n
          • GPIO：\u914d\u7f6e 5 \u4e2a\u6309\u952e\u5f15\u811a\u4e3a \u201c\u8f93\u5165\u4e0b\u62c9\u201d，PA1（\u80cc\u5149）\u4e3a \u201cTIM2_CH1 PWM \u8f93\u51fa\u201d\u3002<\/li>\n
          • RCC：\u5916\u90e8\u9ad8\u901f\u65f6\u949f（25MHz），\u7cfb\u7edf\u65f6\u949f 400MHz\u3002<\/li>\n
          • TIM：TIM6 \u4f5c\u4e3a LVGL \u65f6\u57fa（1ms \u4e2d\u65ad）\u3002<\/li>\n<\/ul>\n<\/li>\n
          • \n

            \u751f\u6210\u5de5\u7a0b（STM32CubeIDE \u683c\u5f0f），\u542f\u7528 FreeRTOS（\u7528\u4e8e\u4efb\u52a1\u8c03\u5ea6）\u3002<\/p>\n<\/li>\n

            2. LVGL \u79fb\u690d\u914d\u7f6e<\/h5>\n
          • \u4e0b\u8f7d LVGL v8.3 \u6e90\u7801，\u590d\u5236\u81f3\u5de5\u7a0b \u201cMiddlewares\/LVGL\u201d \u76ee\u5f55\u3002<\/li>\n
          • \u914d\u7f6elv_conf.h\u5173\u952e\u53c2\u6570：\n

            c<\/p>\n

            \u8fd0\u884c<\/p>\n

            #define LV_HOR_RES_MAX 800
            \n#define LV_VER_RES_MAX 480
            \n#define LV_COLOR_DEPTH 16 \/\/ 16\u4f4d\u8272（RGB565）
            \n#define LV_MEM_SIZE (768 * 1024) \/\/ 768KB\u7f13\u5b58（\u521a\u597d\u5bb9\u7eb3\u4e00\u5e27800*480@16bit）
            \n#define LV_TICK_CUSTOM 1 \/\/ \u4f7f\u7528TIM6\u4f5c\u4e3a\u65f6\u57fa
            \n#define LV_USE_GAUGE 1 \/\/ \u542f\u7528\u4eea\u8868\u7ec4\u4ef6
            \n#define LV_USE_BAR 1 \/\/ \u542f\u7528\u8fdb\u5ea6\u6761\u7ec4\u4ef6<\/p>\n<\/li>\n

          • \u7f16\u5199 QSPI \u663e\u793a\u9a71\u52a8（lv_port_disp.c）：\n
              \n
            • \u5b9e\u73b0disp_init()：\u521d\u59cb\u5316 QSPI \u63a5\u53e3\u4e0e\u6db2\u6676\u5c4f（\u53d1\u9001\u521d\u59cb\u5316\u6307\u4ee4）\u3002<\/li>\n
            • \u5b9e\u73b0disp_flush_cb()：\u5c06 LVGL \u7684\u56fe\u50cf\u6570\u636e\u901a\u8fc7 QSPI \u5199\u5165\u6db2\u6676\u5c4f\u6307\u5b9a\u533a\u57df\u3002<\/li>\n<\/ul>\n<\/li>\n

              \u754c\u9762\u8bbe\u8ba1\u4e0e\u5b9e\u73b0（800*480）<\/h3>\n

              \u6574\u4f53\u5e03\u5c40\u8bbe\u8ba1<\/h4>\n

              \u9488\u5bf9\u65e0\u4eba\u673a\u4e13\u7528\u53c2\u6570，\u754c\u9762\u5212\u5206\u4e3a 5 \u4e2a\u533a\u57df：<\/p>\n<\/p>\n\n\u533a\u57df\u5c3a\u5bf8\u4f4d\u7f6e\u663e\u793a\u5185\u5bb9<\/tr>\n\n\n\n\n\n\n
              \u72b6\u6001\u680f<\/td>\n800*30<\/td>\n\u9876\u90e8（0,0）<\/td>\n\u7cfb\u7edf\u65f6\u95f4\u3001\u98de\u884c\u6a21\u5f0f（\u624b\u52a8 \/ \u81ea\u52a8）\u3001GPS \u72b6\u6001<\/td>\n<\/tr>\n
              \u4e3b\u53c2\u6570\u533a<\/td>\n400*300<\/td>\n\u5de6\u4fa7（0,30）<\/td>\n\u60ac\u505c\u9ad8\u5ea6（\u5927\u5b57\u4f53）\u3001\u5269\u4f59\u7535\u91cf（\u767e\u5206\u6bd4 + \u8fdb\u5ea6\u6761）<\/td>\n<\/tr>\n
              \u7535\u673a\u8f6c\u901f\u533a<\/td>\n400*300<\/td>\n\u53f3\u4fa7（400,30）<\/td>\n4 \u8def\u7535\u673a\u8f6c\u901f\u8868（\u5706\u5f62\u4eea\u8868，0-100%）<\/td>\n<\/tr>\n
              \u8f85\u52a9\u53c2\u6570\u533a<\/td>\n800*120<\/td>\n\u5e95\u90e8（0,330）<\/td>\n\u98de\u884c\u901f\u5ea6\u3001\u7535\u6c60\u7535\u538b\u3001\u7eed\u822a\u65f6\u95f4\u9884\u4f30<\/td>\n<\/tr>\n
              \u6309\u952e\u63d0\u793a\u533a<\/td>\n800*30<\/td>\n\u6700\u5e95\u90e8（0,450）<\/td>\n\u5f53\u524d\u754c\u9762\u53ef\u7528\u6309\u952e\u529f\u80fd\u63d0\u793a（\u5982 \u201c\u83dc\u5355\u952e：\u5207\u6362\u89c6\u56fe\u201d）<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

              \u6838\u5fc3\u4eea\u8868\u5b9e\u73b0<\/h4>\n

              1. \u60ac\u505c\u9ad8\u5ea6\u663e\u793a（\u4e3b\u53c2\u6570\u533a）<\/h5>\n

              c<\/p>\n

              \u8fd0\u884c<\/p>\n

              void altitude_display_init(lv_obj_t *parent) {
              \n \/\/ \u521b\u5efa\u5bb9\u5668（400*300）
              \n lv_obj_t *container = lv_obj_create(parent);
              \n lv_obj_set_size(container, 400, 300);
              \n lv_obj_align(container, LV_ALIGN_TOP_LEFT, 0, 30);
              \n lv_obj_set_style_bg_color(container, lv_color_hex(0x000000), LV_PART_MAIN);<\/p>\n

              \/\/ \u9ad8\u5ea6\u503c\u6807\u7b7e（\u5927\u5b57\u4f53）
              \n lv_obj_t *alt_label = lv_label_create(container);
              \n lv_obj_set_style_text_font(alt_label, &lv_font_montserrat_60, LV_PART_MAIN);
              \n lv_obj_set_style_text_color(alt_label, lv_color_hex(0x00FF00), LV_PART_MAIN);
              \n lv_label_set_text(alt_label, "0.0m");
              \n lv_obj_align(alt_label, LV_ALIGN_CENTER, 0, -30);<\/p>\n

              \/\/ \u9ad8\u5ea6\u5355\u4f4d\u6807\u7b7e
              \n lv_obj_t *unit_label = lv_label_create(container);
              \n lv_obj_set_style_text_font(unit_label, &lv_font_montserrat_24, LV_PART_MAIN);
              \n lv_label_set_text(unit_label, "\u60ac\u505c\u9ad8\u5ea6");
              \n lv_obj_align(unit_label, LV_ALIGN_CENTER, 0, 30);
              \n}<\/p>\n

              \/\/ \u66f4\u65b0\u9ad8\u5ea6\u503c
              \nvoid altitude_update(float height) {
              \n char buf[10];
              \n sprintf(buf, "%.1fm", height);
              \n lv_label_set_text(alt_label, buf);
              \n \/\/ \u9ad8\u5ea6\u5f02\u5e38（>50m\u6216<0）\u65f6\u53d8\u7ea2
              \n if (height < 0 || height > 50) {
              \n lv_obj_set_style_text_color(alt_label, lv_color_hex(0xFF0000), LV_PART_MAIN);
              \n } else {
              \n lv_obj_set_style_text_color(alt_label, lv_color_hex(0x00FF00), LV_PART_MAIN);
              \n }
              \n}<\/p>\n

              2. \u5269\u4f59\u7535\u91cf\u663e\u793a（\u4e3b\u53c2\u6570\u533a\u4e0b\u65b9）<\/h5>\n

              c<\/p>\n

              \u8fd0\u884c<\/p>\n

              void battery_display_init(lv_obj_t *parent) {
              \n \/\/ \u521b\u5efa\u7535\u6c60\u5bb9\u5668（400*50）
              \n lv_obj_t *container = lv_obj_create(parent);
              \n lv_obj_set_size(container, 400, 50);
              \n lv_obj_align(container, LV_ALIGN_TOP_LEFT, 0, 330-50); \/\/ \u4e3b\u53c2\u6570\u533a\u4e0b\u65b9<\/p>\n

              \/\/ \u7535\u91cf\u8fdb\u5ea6\u6761
              \n lv_obj_t *bat_bar = lv_bar_create(container);
              \n lv_obj_set_size(bat_bar, 200, 20);
              \n lv_obj_align(bat_bar, LV_ALIGN_CENTER, -50, 0);
              \n lv_bar_set_range(bat_bar, 0, 100);<\/p>\n

              \/\/ \u7535\u91cf\u767e\u5206\u6bd4\u6807\u7b7e
              \n lv_obj_t *bat_label = lv_label_create(container);
              \n lv_obj_set_style_text_font(bat_label, &lv_font_montserrat_20, LV_PART_MAIN);
              \n lv_label_set_text(bat_label, "100%");
              \n lv_obj_align(bat_label, LV_ALIGN_CENTER, 80, 0);
              \n}<\/p>\n

              \/\/ \u66f4\u65b0\u7535\u91cf
              \nvoid battery_update(uint8_t percentage) {
              \n lv_bar_set_value(bat_bar, percentage, LV_ANIM_ON);
              \n char buf[5];
              \n sprintf(buf, "%d%%", percentage);
              \n lv_label_set_text(bat_label, buf);
              \n \/\/ \u4f4e\u7535\u91cf（<20%）\u65f6\u8fdb\u5ea6\u6761\u53d8\u7ea2
              \n if (percentage < 20) {
              \n lv_obj_set_style_bg_color(bat_bar, lv_color_hex(0xFF0000), LV_PART_INDICATOR);
              \n } else {
              \n lv_obj_set_style_bg_color(bat_bar, lv_color_hex(0x00FF00), LV_PART_INDICATOR);
              \n }
              \n}<\/p>\n

              3. \u7535\u673a\u8f6c\u901f\u8868（\u53f3\u4fa7 400*300 \u533a\u57df）<\/h5>\n

              c<\/p>\n

              \u8fd0\u884c<\/p>\n

              void motor_gauge_init(lv_obj_t *parent) {
              \n \/\/ \u521b\u5efa4\u4e2a\u7535\u673a\u4eea\u8868（2×2\u5e03\u5c40）
              \n for (int i = 0; i < 4; i++) {
              \n lv_obj_t *gauge = lv_gauge_create(parent);
              \n lv_obj_set_size(gauge, 180, 180);
              \n \/\/ \u8bbe\u7f6e\u4f4d\u7f6e（2×2\u7f51\u683c）
              \n int x = (i%2) * 200 + 10;
              \n int y = (i\/2) * 150 + 10;
              \n lv_obj_align(gauge, LV_ALIGN_TOP_LEFT, 400 + x, 30 + y);<\/p>\n

              \/\/ \u914d\u7f6e\u4eea\u8868\u8303\u56f4（0-100%）
              \n lv_gauge_set_range(gauge, 0, 100);
              \n lv_gauge_set_critical_value(gauge, 90); \/\/ 90%\u4ee5\u4e0a\u4e3a\u8b66\u6212\u503c
              \n lv_gauge_add_needle_line(gauge, lv_color_hex(0x00FF00), 3, 50); \/\/ \u7eff\u8272\u6307\u9488<\/p>\n

              \/\/ \u7535\u673a\u7f16\u53f7\u6807\u7b7e
              \n lv_obj_t *label = lv_label_create(gauge);
              \n lv_label_set_text_fmt(label, "\u7535\u673a%d", i+1);
              \n lv_obj_align(label, LV_ALIGN_BOTTOM_MID, 0, -10);
              \n }
              \n}<\/p>\n

              \/\/ \u66f4\u65b0\u7535\u673a\u8f6c\u901f（0-100%）
              \nvoid motor_speed_update(uint8_t motor_id, uint8_t speed) {
              \n if (motor_id >= 4) return;
              \n lv_gauge_set_value(motors[motor_id], 0, speed);
              \n \/\/ \u8d85\u8b66\u6212\u503c（>90%）\u65f6\u6307\u9488\u53d8\u7ea2
              \n if (speed > 90) {
              \n lv_gauge_set_needle_color(motors[motor_id], 0, lv_color_hex(0xFF0000));
              \n } else {
              \n lv_gauge_set_needle_color(motors[motor_id], 0, lv_color_hex(0x00FF00));
              \n }
              \n}<\/p>\n

              \u6838\u5fc3\u529f\u80fd\u5f00\u53d1<\/h3>\n

              1. QSPI \u6db2\u6676\u5c4f\u9a71\u52a8<\/h4>\n

              c<\/p>\n

              \u8fd0\u884c<\/p>\n

              \/\/ \u6db2\u6676\u5c4f\u521d\u59cb\u5316（\u53d1\u9001QSPI\u547d\u4ee4）
              \nvoid qspi_lcd_init(void) {
              \n \/\/ \u590d\u4f4d\u6db2\u6676\u5c4f
              \n HAL_GPIO_WritePin(GPIOA, GPIO_PIN_0, GPIO_PIN_RESET);
              \n HAL_Delay(100);
              \n HAL_GPIO_WritePin(GPIOA, GPIO_PIN_0, GPIO_PIN_SET);
              \n HAL_Delay(100);<\/p>\n

              \/\/ \u521d\u59cb\u5316QSPI\u63a5\u53e3（STM32CubeMX\u5df2\u914d\u7f6e，\u6b64\u5904\u53d1\u9001\u5c4f\u521d\u59cb\u5316\u6307\u4ee4）
              \n qspi_send_cmd(0x11); \/\/ \u9000\u51fa\u7761\u7720\u6a21\u5f0f
              \n HAL_Delay(120);
              \n qspi_send_cmd(0x29); \/\/ \u5f00\u542f\u663e\u793a
              \n qspi_send_cmd(0x36, 0x00); \/\/ \u8bbe\u7f6e\u663e\u793a\u65b9\u5411
              \n}<\/p>\n

              \/\/ \u901a\u8fc7QSPI\u53d1\u9001\u547d\u4ee4
              \nstatic void qspi_send_cmd(uint8_t cmd, uint8_t data) {
              \n \/\/ \u7247\u9009\u4f7f\u80fd
              \n HAL_QSPI_Command(&hqspi, &(QSPI_CommandTypeDef){
              \n .Instruction = cmd,
              \n .InstructionMode = QSPI_INSTRUCTION_1_LINE,
              \n .AddressMode = QSPI_ADDRESS_NONE,
              \n .DataMode = QSPI_DATA_1_LINE,
              \n .DummyCycles = 0,
              \n .NbData = 1,
              \n .DdrMode = QSPI_DDR_MODE_DISABLE,
              \n .DdrHoldHalfCycle = QSPI_DDR_HHC_DISABLE,
              \n .SIOOMode = QSPI_SIOO_INST_EVERY_CMD
              \n }, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);<\/p>\n

              \/\/ \u53d1\u9001\u6570\u636e
              \n HAL_QSPI_Transmit(&hqspi, &data, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);<\/p>\n

              \/\/ \u7247\u9009\u7981\u7528
              \n HAL_QSPI_Abort(&hqspi);
              \n}<\/p>\n

              \/\/ LVGL\u5237\u65b0\u56de\u8c03（\u5c06\u56fe\u50cf\u6570\u636e\u5199\u5165\u6db2\u6676\u5c4f）
              \nstatic void disp_flush(lv_disp_drv_t *disp, const lv_area_t *area, lv_color_t *color_p) {
              \n \/\/ \u8bbe\u7f6e\u6db2\u6676\u5c4f\u663e\u793a\u533a\u57df（area->x1, area->y1\u5230area->x2, area->y2）
              \n lcd_set_window(area->x1, area->y1, area->x2, area->y2);<\/p>\n

              \/\/ \u8ba1\u7b97\u6570\u636e\u957f\u5ea6（\u50cf\u7d20\u6570\u00d72\u5b57\u8282\/\u50cf\u7d20）
              \n uint32_t length = (area->x2 – area->x1 + 1) * (area->y2 – area->y1 + 1) * 2;<\/p>\n

              \/\/ \u901a\u8fc7QSPI\u53d1\u9001\u56fe\u50cf\u6570\u636e
              \n HAL_QSPI_Command(&hqspi, &(QSPI_CommandTypeDef){
              \n .Instruction = 0x2C, \/\/ \u5199\u5165GRAM\u547d\u4ee4
              \n .InstructionMode = QSPI_INSTRUCTION_1_LINE,
              \n .AddressMode = QSPI_ADDRESS_NONE,
              \n .DataMode = QSPI_DATA_4_LINES, \/\/ 4\u7ebf\u6a21\u5f0f\u52a0\u901f\u4f20\u8f93
              \n .DummyCycles = 0,
              \n .NbData = length,
              \n .DdrMode = QSPI_DDR_MODE_DISABLE,
              \n .DdrHoldHalfCycle = QSPI_DDR_HHC_DISABLE,
              \n .SIOOMode = QSPI_SIOO_INST_EVERY_CMD
              \n }, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);<\/p>\n

              HAL_QSPI_Transmit(&hqspi, (uint8_t*)color_p, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
              \n HAL_QSPI_Abort(&hqspi);<\/p>\n

              \/\/ \u901a\u77e5LVGL\u5237\u65b0\u5b8c\u6210
              \n lv_disp_flush_ready(disp);
              \n}<\/p>\n

              2. CAN FD \u6570\u636e\u63a5\u6536\u4e0e\u89e3\u6790<\/h4>\n

              c<\/p>\n

              \u8fd0\u884c<\/p>\n

              \/\/ CAN FD\u521d\u59cb\u5316
              \nvoid can_fd_init(void) {
              \n \/\/ \u8fc7\u6ee4\u5668\u914d\u7f6e（\u63a5\u6536\u6240\u6709\u65e0\u4eba\u673a\u6570\u636e\u5e27）
              \n CAN_FilterTypeDef filter = {
              \n .FilterActivation = ENABLE,
              \n .FilterBank = 0,
              \n .FilterMode = CAN_FILTERMODE_IDMASK,
              \n .FilterScale = CAN_FILTERSCALE_32BIT,
              \n .FilterIdHigh = 0x0000,
              \n .FilterIdLow = 0x0000,
              \n .FilterMaskIdHigh = 0x0000,
              \n .FilterMaskIdLow = 0x0000,
              \n .FilterFIFOAssignment = CAN_RX_FIFO0
              \n };
              \n HAL_CAN_ConfigFilter(&hcan1, &filter);<\/p>\n

              \/\/ \u542f\u52a8CAN FD\u5e76\u4f7f\u80fd\u63a5\u6536\u4e2d\u65ad
              \n HAL_CAN_Start(&hcan1);
              \n HAL_CAN_ActivateNotification(&hcan1, CAN_IT_RX_FIFO0_MSG_PENDING);
              \n}<\/p>\n

              \/\/ CAN FD\u63a5\u6536\u4e2d\u65ad\u56de\u8c03
              \nvoid HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) {
              \n CAN_RxHeaderTypeDef rx_header;
              \n uint8_t rx_data[64]; \/\/ CAN FD\u6700\u5927\u6570\u636e\u957f\u5ea664\u5b57\u8282<\/p>\n

              if (HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &rx_header, rx_data) == HAL_OK) {
              \n \/\/ \u6839\u636eID\u89e3\u6790\u6570\u636e（\u65e0\u4eba\u673a\u81ea\u5b9a\u4e49\u534f\u8bae）
              \n switch (rx_header.StdId) {
              \n case 0x101: \/\/ \u98de\u884c\u72b6\u6001\u5e27（\u9ad8\u5ea6\u3001\u7535\u91cf\u7b49）
              \n parse_flight_status(rx_data, rx_header.DLC);
              \n break;
              \n case 0x102: \/\/ \u7535\u673a\u72b6\u6001\u5e27
              \n parse_motor_status(rx_data, rx_header.DLC);
              \n break;
              \n \/\/ \u5176\u4ed6\u5e27\u7c7b\u578b…
              \n }
              \n }
              \n}<\/p>\n

              \/\/ \u89e3\u6790\u98de\u884c\u72b6\u6001\u5e27（\u793a\u4f8b：rx_data[0-3]\u4e3a\u9ad8\u5ea6，rx_data[4]\u4e3a\u7535\u91cf）
              \nstatic void parse_flight_status(uint8_t *data, uint8_t len) {
              \n if (len < 5) return;
              \n \/\/ \u9ad8\u5ea6（float\u7c7b\u578b，\u5c0f\u7aef\u683c\u5f0f）
              \n float height;
              \n memcpy(&height, data, 4);
              \n altitude_update(height);<\/p>\n

              \/\/ \u7535\u91cf（\u767e\u5206\u6bd4）
              \n battery_update(data[4]);
              \n}<\/p>\n

              \/\/ \u89e3\u6790\u7535\u673a\u72b6\u6001\u5e27（\u793a\u4f8b：rx_data[0-3]\u4e3a4\u8def\u7535\u673a\u8f6c\u901f\u767e\u5206\u6bd4）
              \nstatic void parse_motor_status(uint8_t *data, uint8_t len) {
              \n if (len < 4) return;
              \n for (int i = 0; i < 4; i++) {
              \n motor_speed_update(i, data[i]);
              \n }
              \n}<\/p>\n

              3. \u6309\u952e\u5904\u7406<\/h4>\n

              c<\/p>\n

              \u8fd0\u884c<\/p>\n

              \/\/ \u6309\u952e\u626b\u63cf\u4efb\u52a1（FreeRTOS\u4efb\u52a1）
              \nvoid key_scan_task(void *arg) {
              \n uint8_t key_state[5] = {1,1,1,1,1}; \/\/ \u521d\u59cb\u72b6\u6001（\u672a\u6309\u4e0b）
              \n uint8_t key_prev[5] = {1,1,1,1,1}; \/\/ \u4e0a\u4e00\u72b6\u6001<\/p>\n

              while (1) {
              \n \/\/ \u8bfb\u53d65\u4e2a\u6309\u952e\u72b6\u6001（0=\u6309\u4e0b，1=\u672a\u6309\u4e0b）
              \n key_state[0] = HAL_GPIO_ReadPin(GPIOC, GPIO_PIN_0); \/\/ \u7535\u6e90\u952e
              \n key_state[1] = HAL_GPIO_ReadPin(GPIOC, GPIO_PIN_1); \/\/ \u83dc\u5355\u952e
              \n key_state[2] = HAL_GPIO_ReadPin(GPIOC, GPIO_PIN_2); \/\/ \u4e0a\u9009\u62e9\u952e
              \n key_state[3] = HAL_GPIO_ReadPin(GPIOC, GPIO_PIN_3); \/\/ \u4e0b\u9009\u62e9\u952e
              \n key_state[4] = HAL_GPIO_ReadPin(GPIOC, GPIO_PIN_4); \/\/ \u786e\u8ba4\u952e<\/p>\n

              \/\/ \u68c0\u6d4b\u6309\u952e\u4e0b\u964d\u6cbf（\u6309\u4e0b\u4e8b\u4ef6）
              \n for (int i = 0; i < 5; i++) {
              \n if (key_state[i] == 0 && key_prev[i] == 1) {
              \n key_handler(i); \/\/ \u5904\u7406\u6309\u952e\u4e8b\u4ef6
              \n }
              \n key_prev[i] = key_state[i];
              \n }<\/p>\n

              osDelay(20); \/\/ 20ms\u626b\u63cf\u4e00\u6b21，\u53bb\u6296
              \n }
              \n}<\/p>\n

              \/\/ \u6309\u952e\u4e8b\u4ef6\u5904\u7406
              \nstatic void key_handler(uint8_t key_id) {
              \n switch (key_id) {
              \n case 1: \/\/ \u83dc\u5355\u952e
              \n ui_switch_view(); \/\/ \u5207\u6362\u754c\u9762\u89c6\u56fe
              \n break;
              \n case 2: \/\/ \u4e0a\u9009\u62e9\u952e
              \n ui_param_increase(); \/\/ \u53c2\u6570\u589e\u52a0
              \n break;
              \n case 3: \/\/ \u4e0b\u9009\u62e9\u952e
              \n ui_param_decrease(); \/\/ \u53c2\u6570\u51cf\u5c11
              \n break;
              \n case 4: \/\/ \u786e\u8ba4\u952e
              \n ui_param_confirm(); \/\/ \u786e\u8ba4\u53c2\u6570
              \n break;
              \n \/\/ \u7535\u6e90\u952e\u5904\u7406（\u7565）
              \n }
              \n}<\/p>\n

              \u7cfb\u7edf\u96c6\u6210\u4e0e\u4e3b\u7a0b\u5e8f<\/h3>\n

              c<\/p>\n

              \u8fd0\u884c<\/p>\n

              \/\/ \u4e3b\u7a0b\u5e8f\u5165\u53e3
              \nint main(void) {
              \n \/\/ \u786c\u4ef6\u521d\u59cb\u5316
              \n HAL_Init();
              \n SystemClock_Config(); \/\/ \u914d\u7f6e400MHz\u7cfb\u7edf\u65f6\u949f
              \n MX_GPIO_Init();
              \n MX_QSPI_Init();
              \n MX_CAN1_Init();
              \n MX_TIM6_Init(); \/\/ LVGL\u65f6\u57fa
              \n MX_FREERTOS_Init(); \/\/ \u521d\u59cb\u5316FreeRTOS<\/p>\n

              \/\/ \u5916\u8bbe\u521d\u59cb\u5316
              \n qspi_lcd_init(); \/\/ QSPI\u6db2\u6676\u5c4f\u521d\u59cb\u5316
              \n can_fd_init(); \/\/ CAN FD\u521d\u59cb\u5316<\/p>\n

              \/\/ LVGL\u521d\u59cb\u5316
              \n lv_init();
              \n lv_port_disp_init(); \/\/ \u7ed1\u5b9a\u663e\u793a\u9a71\u52a8
              \n ui_init(); \/\/ \u521d\u59cb\u5316\u754c\u9762\u5143\u7d20<\/p>\n

              \/\/ \u521b\u5efa\u4efb\u52a1
              \n osThreadNew(key_scan_task, NULL, &key_scan_task_attributes);
              \n osThreadNew(ui_refresh_task, NULL, &ui_refresh_task_attributes);<\/p>\n

              \/\/ \u542f\u52a8\u8c03\u5ea6\u5668
              \n osKernelStart();<\/p>\n

              while (1) {
              \n \/\/ \u4e3b\u5faa\u73af（FreeRTOS\u8c03\u5ea6\u5668\u8fd0\u884c\u540e\u4e0d\u4f1a\u6267\u884c\u5230\u8fd9\u91cc）
              \n }
              \n}<\/p>\n

              \/\/ \u754c\u9762\u5237\u65b0\u4efb\u52a1（100ms\u4e00\u6b21）
              \nvoid ui_refresh_task(void *arg) {
              \n while (1) {
              \n lv_task_handler(); \/\/ \u5904\u7406LVGL\u4efb\u52a1
              \n osDelay(10); \/\/ 10ms\u4e00\u6b21，\u4fdd\u8bc1\u754c\u9762\u6d41\u7545
              \n }
              \n}<\/p>\n

              \u6d4b\u8bd5\u4e0e\u8c03\u8bd5<\/h3>\n

              \u5173\u952e\u6d4b\u8bd5\u9879<\/h4>\n
            • \n

              QSPI \u663e\u793a\u6d4b\u8bd5：<\/p>\n

                \n
              • \u6d4b\u8bd5\u5185\u5bb9：\u5168\u5c4f\u7eaf\u8272\u586b\u5145（\u7ea2 \/ \u7eff \/ \u84dd）\u3001\u7070\u5ea6\u6e10\u53d8\u3001\u5b57\u7b26\u663e\u793a\u3002<\/li>\n
              • \u9a8c\u6536\u6807\u51c6：\u65e0\u82b1\u5c4f\u3001\u65e0\u62d6\u5f71，\u989c\u8272\u8fc7\u6e21\u5747\u5300\u3002<\/li>\n<\/ul>\n<\/li>\n
              • \n

                CAN FD \u901a\u4fe1\u6d4b\u8bd5：<\/p>\n

                  \n
                • \u6d4b\u8bd5\u5de5\u5177：CANoe \u4eff\u771f\u65e0\u4eba\u673a\u6570\u636e\u5e27（0x101\u30010x102 \u7b49 ID）\u3002<\/li>\n
                • \u9a8c\u6536\u6807\u51c6：\u63a5\u6536\u6210\u529f\u7387 100%，\u6570\u636e\u89e3\u6790\u6b63\u786e，\u754c\u9762\u66f4\u65b0\u5ef6\u8fdf < 100ms\u3002<\/li>\n<\/ul>\n<\/li>\n
                • \n

                  \u6309\u952e\u529f\u80fd\u6d4b\u8bd5：<\/p>\n

                    \n
                  • \u6d4b\u8bd5\u5185\u5bb9：\u8fde\u7eed\u6309\u952e 5000 \u6b21，\u68c0\u67e5\u662f\u5426\u6709\u8bef\u89e6\u53d1\u6216\u5931\u6548\u3002<\/li>\n
                  • \u9a8c\u6536\u6807\u51c6：\u54cd\u5e94\u7387 100%，\u65e0\u7c98\u8fde\u73b0\u8c61\u3002<\/li>\n<\/ul>\n<\/li>\n
                  • \n

                    \u7cfb\u7edf\u7a33\u5b9a\u6027\u6d4b\u8bd5：<\/p>\n

                      \n
                    • \u6d4b\u8bd5\u65b9\u6cd5：\u8fde\u7eed\u8fd0\u884c 24 \u5c0f\u65f6，\u6a21\u62df\u632f\u52a8（\u53ef\u9009）\u3002<\/li>\n
                    • \u9a8c\u6536\u6807\u51c6：\u65e0\u6b7b\u673a\u3001\u65e0\u6570\u636e\u4e22\u5931，\u754c\u9762\u6b63\u5e38\u5237\u65b0\u3002<\/li>\n<\/ul>\n<\/li>\n

                      \u5e38\u89c1\u95ee\u9898\u89e3\u51b3<\/h4>\n\n\u95ee\u9898\u539f\u56e0\u89e3\u51b3\u65b9\u6848<\/tr>\n\n\n\n\n\n
                      QSPI \u4f20\u8f93\u6570\u636e\u9519\u8bef<\/td>\n\u65f6\u949f\u9891\u7387\u8fc7\u9ad8（>80MHz）\u6216\u5e03\u7ebf\u4e0d\u826f<\/td>\n\u964d\u4f4e QSPI \u65f6\u949f\u81f3 60MHz，\u4f18\u5316 PCB \u5e03\u7ebf（\u7f29\u77ed\u7ebf\u957f，\u963b\u6297\u5339\u914d）<\/td>\n<\/tr>\n
                      CAN FD \u63a5\u6536\u4e22\u5e27<\/td>\n\u6ce2\u7279\u7387\u914d\u7f6e\u9519\u8bef\u6216 FIFO \u6ea2\u51fa<\/td>\n\u91cd\u65b0\u6821\u51c6 CAN FD \u6ce2\u7279\u7387，\u5728\u4e2d\u65ad\u4e2d\u53ca\u65f6\u5904\u7406\u6570\u636e（\u51cf\u5c11\u8017\u65f6\u64cd\u4f5c）<\/td>\n<\/tr>\n
                      \u754c\u9762\u5361\u987f<\/td>\nLVGL \u7f13\u5b58\u4e0d\u8db3\u6216\u5237\u65b0\u9891\u7387\u8fc7\u9ad8<\/td>\n\u786e\u4fdd LV_MEM_SIZE\u2265768KB，\u9650\u5236\u754c\u9762\u5143\u7d20\u6570\u91cf（\u51cf\u5c11\u91cd\u7ed8\u533a\u57df）<\/td>\n<\/tr>\n
                      \u6309\u952e\u8bef\u89e6\u53d1<\/td>\n\u65e0\u786c\u4ef6\u6d88\u6296\u6216\u626b\u63cf\u9891\u7387\u8fc7\u4f4e<\/td>\n\u589e\u52a0 10K\u03a9 \u4e0b\u62c9\u7535\u963b + 100nF \u7535\u5bb9\u6d88\u6296，\u63d0\u9ad8\u626b\u63cf\u9891\u7387\u81f3 50Hz<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

                      \u603b\u7ed3\u4e0e\u5c55\u671b<\/h3>\n

                      \u672c\u65b9\u6848\u57fa\u4e8e STM32 \u4e0e QSPI \u5c4f\u6784\u5efa\u4e86\u65e0\u4eba\u673a\u4e13\u7528 MFD，\u901a\u8fc7 CAN FD \u603b\u7ebf\u5b9e\u73b0\u9ad8\u901f\u6570\u636e\u4ea4\u4e92，\u7269\u7406\u6309\u952e\u64cd\u4f5c\u7b80\u5355\u53ef\u9760，\u91cd\u70b9\u5448\u73b0\u4e86\u5269\u4f59\u7535\u91cf\u3001\u7535\u673a\u8f6c\u901f\u3001\u60ac\u505c\u9ad8\u5ea6\u7b49\u6838\u5fc3\u53c2\u6570\u3002\u65b9\u6848\u4f18\u52bf\u5728\u4e8e：<\/p>\n<\/p>\n

                    • \u786c\u4ef6\u7cbe\u7b80：\u76f4\u63a5 QSPI \u9a71\u52a8\u6db2\u6676\u5c4f，\u7701\u53bb RGB \u8f6c\u6362\u6a21\u5757，\u964d\u4f4e\u6210\u672c\u4e0e\u6545\u969c\u7387\u3002<\/li>\n
                    • \u5b9e\u65f6\u6027\u5f3a：CAN FD \u603b\u7ebf\u652f\u6301 8Mbps \u4f20\u8f93\u901f\u7387，\u914d\u5408 10Hz \u754c\u9762\u5237\u65b0\u7387，\u6ee1\u8db3\u65e0\u4eba\u673a\u6570\u636e\u5b9e\u65f6\u6027\u9700\u6c42\u3002<\/li>\n
                    • \u4e13\u7528\u6027\u7a81\u51fa：\u754c\u9762\u5e03\u5c40\u9488\u5bf9\u65e0\u4eba\u673a\u53c2\u6570\u4f18\u5316，\u5173\u952e\u4fe1\u606f\u4e00\u76ee\u4e86\u7136\u3002<\/li>\n

                      \u672a\u6765\u53ef\u6269\u5c55\u65b9\u5411：<\/p>\n

                        \n
                      • \u589e\u52a0\u6570\u636e\u8bb0\u5f55\u529f\u80fd（\u901a\u8fc7 SD \u5361\u5b58\u50a8\u98de\u884c\u53c2\u6570）\u3002<\/li>\n
                      • \u5f00\u53d1\u591a\u89c6\u56fe\u5207\u6362（\u5982\u589e\u52a0\u59ff\u6001\u4eea\u8868\u3001\u822a\u7ebf\u89c4\u5212\u89c6\u56fe）\u3002<\/li>\n
                      • \u96c6\u6210\u65e0\u7ebf\u6570\u4f20\u6a21\u5757（\u5982 4G），\u652f\u6301\u8fdc\u7a0b\u76d1\u63a7\u3002<\/li>\n<\/ul>\n","protected":false},"excerpt":{"rendered":"

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