{"id":109994,"date":"2026-09-25T12:48:52","date_gmt":"2026-09-25T04:48:52","guid":{"rendered":"https:\/\/www.wsisp.com\/helps\/109994.html"},"modified":"2026-09-25T12:48:52","modified_gmt":"2026-09-25T04:48:52","slug":"%e5%8f%82%e8%80%83%e6%97%b6%e9%92%9f%e4%b8%8e-ssc-%e6%89%a9%e9%a2%91%e8%a7%a3%e6%9e%90","status":"publish","type":"post","link":"https:\/\/www.wsisp.com\/helps\/109994.html","title":{"rendered":"\u53c2\u8003\u65f6\u949f\u4e0e SSC \u6269\u9891\u89e3\u6790"},"content":{"rendered":"

\u76ee\u5f55<\/p>\n

1. \u53c2\u8003\u65f6\u949f\u662f\u4ec0\u4e48？<\/p>\n

2. \u53c2\u8003\u65f6\u949f\u7684\u4f5c\u7528<\/p>\n

3. \u53c2\u8003\u65f6\u949f\u7684\u6765\u6e90<\/p>\n

3.1 \u6676\u4f53 Crystal<\/p>\n

3.2 \u6709\u6e90\u6676\u632f Oscillator<\/p>\n

3.3 \u65f6\u949f\u53d1\u751f\u5668 Clock Generator<\/p>\n

3.4 PLL \/ Clock Synthesizer<\/p>\n

4. \u53c2\u8003\u65f6\u949f\u7684\u5173\u952e\u6307\u6807<\/p>\n

4.1 \u9891\u7387 Frequency<\/p>\n

4.2 \u7cbe\u5ea6 Accuracy<\/p>\n

4.3 \u6296\u52a8 Jitter<\/p>\n

4.4 \u76f8\u4f4d\u566a\u58f0 Phase Noise<\/p>\n

4.5 \u5360\u7a7a\u6bd4 Duty Cycle<\/p>\n

4.6 \u8f93\u51fa\u7535\u5e73\u683c\u5f0f<\/p>\n

5. \u4ec0\u4e48\u662f SSC \u6269\u9891？<\/p>\n

6. \u4e3a\u4ec0\u4e48\u9700\u8981 SSC？<\/p>\n

7. SSC \u7684\u57fa\u672c\u539f\u7406<\/p>\n

8. SSC \u7684\u6269\u9891\u7c7b\u578b<\/p>\n

8.1 Down Spread<\/p>\n

8.2 Center Spread<\/p>\n

8.3 Up Spread<\/p>\n

9. SSC \u7684\u5173\u952e\u53c2\u6570<\/p>\n

9.1 \u6269\u9891\u6df1\u5ea6 Spread Deviation<\/p>\n

9.2 \u8c03\u5236\u9891\u7387 Modulation Frequency<\/p>\n

9.3 \u8c03\u5236\u6ce2\u5f62 Modulation Profile<\/p>\n

10. SSC \u7684\u5de5\u4f5c\u6d41\u7a0b<\/p>\n

11. SSC \u5bf9\u9891\u8c31\u7684\u5f71\u54cd<\/p>\n

12. SSC \u7684\u5178\u578b\u5e94\u7528\u573a\u666f<\/p>\n

12.1 PCIe<\/p>\n

12.2 SATA<\/p>\n

12.3 USB<\/p>\n

12.4 DisplayPort \/ HDMI<\/p>\n

12.5 Ethernet \/ SerDes<\/p>\n

12.6 CPU \/ SoC \/ DDR<\/p>\n

13. SSC \u7684\u4f18\u70b9<\/p>\n

14. SSC \u7684\u6f5c\u5728\u95ee\u9898<\/p>\n

14.1 \u63a5\u6536\u7aef PLL \u53ef\u80fd\u65e0\u6cd5\u8ddf\u8e2a<\/p>\n

14.2 \u589e\u52a0\u4f4e\u9891\u9891\u7387\u8c03\u5236\u6210\u5206<\/p>\n

14.3 \u4e0d\u9002\u5408\u6240\u6709\u65f6\u949f<\/p>\n

14.4 \u591a\u65f6\u949f\u57df\u53ef\u80fd\u4ea7\u751f beat \u95ee\u9898<\/p>\n

15. SSC \u8bbe\u8ba1\u6d41\u7a0b<\/p>\n

Step 1：\u786e\u8ba4\u534f\u8bae\u548c\u82af\u7247\u662f\u5426\u652f\u6301<\/p>\n

Step 2：\u786e\u5b9a\u65f6\u949f\u67b6\u6784<\/p>\n

Step 3：\u9009\u62e9 SSC \u6a21\u5f0f<\/p>\n

Step 4：\u8bc4\u4f30\u6296\u52a8\u548c\u9891\u504f<\/p>\n

Step 5：PCB \u8bbe\u8ba1<\/p>\n

Step 6：\u5b9e\u9a8c\u9a8c\u8bc1<\/p>\n

16. \u5e38\u89c1\u914d\u7f6e\u793a\u4f8b<\/p>\n

\u793a\u4f8b 1：PCIe 100 MHz SSC<\/p>\n

\u793a\u4f8b 2：100 MHz Center Spread<\/p>\n

\u793a\u4f8b 3：25 MHz \u7cfb\u7edf\u65f6\u949f Down Spread<\/p>\n

17. SSC \u4e0e Jitter \u7684\u5173\u7cfb<\/p>\n

17.1 \u968f\u673a\u6296\u52a8 Random Jitter<\/p>\n

17.2 \u786e\u5b9a\u6027\u6296\u52a8 Deterministic Jitter<\/p>\n

18. \u5f00\u542f SSC \u540e\u5982\u4f55\u89c2\u5bdf？<\/p>\n

18.1 \u7528\u9891\u8c31\u4eea\u89c2\u5bdf<\/p>\n

18.2 \u7528\u793a\u6ce2\u5668\u89c2\u5bdf<\/p>\n

18.3 \u7528\u76f8\u4f4d\u566a\u58f0\u4eea\u89c2\u5bdf<\/p>\n

19. \u8bbe\u8ba1\u6ce8\u610f\u4e8b\u9879\u603b\u7ed3<\/p>\n

20. \u7b80\u5355\u603b\u7ed3<\/p>\n

\n

1. \u53c2\u8003\u65f6\u949f\u662f\u4ec0\u4e48？<\/h2>\n

\u53c2\u8003\u65f6\u949f\u901a\u5e38\u7b80\u79f0\u4e3a Ref Clock，\u662f\u7cfb\u7edf\u4e2d\u7528\u4e8e\u63d0\u4f9b\u57fa\u51c6\u9891\u7387\u7684\u65f6\u949f\u4fe1\u53f7\u3002\u82af\u7247\u3001\u63a5\u53e3\u3001PLL\u3001SerDes\u3001CPU\u3001PCIe\u3001SATA\u3001USB\u3001\u4ee5\u592a\u7f51\u7b49\u6a21\u5757\u901a\u5e38\u90fd\u9700\u8981\u4e00\u4e2a\u7a33\u5b9a\u7684\u53c2\u8003\u65f6\u949f\u3002<\/p>\n

\u4f8b\u5982：<\/p>\n\n\u5e94\u7528\u5e38\u89c1\u53c2\u8003\u65f6\u949f\u9891\u7387<\/tr>\n\n\n\n\n\n\n\n
PCIe<\/td>\n100 MHz<\/td>\n<\/tr>\n
SATA<\/td>\n100 MHz \/ 150 MHz<\/td>\n<\/tr>\n
USB<\/td>\n24 MHz \/ 48 MHz<\/td>\n<\/tr>\n
Ethernet<\/td>\n25 MHz \/ 125 MHz \/ 156.25 MHz<\/td>\n<\/tr>\n
DDR<\/td>\n100 MHz \/ 133 MHz \/ 200 MHz<\/td>\n<\/tr>\n
FPGA\/SoC<\/td>\n25 MHz \/ 50 MHz \/ 100 MHz \u7b49<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
\n

2. \u53c2\u8003\u65f6\u949f\u7684\u4f5c\u7528<\/h2>\n

\u53c2\u8003\u65f6\u949f\u4e3b\u8981\u7528\u4e8e：<\/p>\n

  • \n

    \u7ed9 PLL \u63d0\u4f9b\u8f93\u5165\u57fa\u51c6<\/p>\n

      \n
    • PLL \u6839\u636e\u53c2\u8003\u65f6\u949f\u500d\u9891\u3001\u5206\u9891\u751f\u6210\u5185\u90e8\u9ad8\u901f\u65f6\u949f\u3002<\/li>\n
    • \u4f8b\u5982 100 MHz \u53c2\u8003\u65f6\u949f\u7ecf\u8fc7 PLL \u500d\u9891\u751f\u6210 5 GHz SerDes \u65f6\u949f\u3002<\/li>\n<\/ul>\n<\/li>\n
    • \n

      \u4fdd\u8bc1\u7cfb\u7edf\u540c\u6b65<\/p>\n

        \n
      • \u591a\u4e2a\u6a21\u5757\u4f7f\u7528\u540c\u4e00\u4e2a\u53c2\u8003\u65f6\u949f，\u53ef\u4ee5\u4fdd\u6301\u65f6\u5e8f\u4e00\u81f4\u3002<\/li>\n
      • \u5728\u901a\u4fe1\u7cfb\u7edf\u4e2d\u5c24\u5176\u91cd\u8981\u3002<\/li>\n<\/ul>\n<\/li>\n
      • \n

        \u964d\u4f4e\u9891\u7387\u8bef\u5dee<\/p>\n

          \n
        • \u6676\u632f\u6216\u65f6\u949f\u82af\u7247\u7684\u7cbe\u5ea6\u901a\u5e38\u4ee5 ppm \u8868\u793a\u3002<\/li>\n
        • \u4f8b\u5982 \u00b150 ppm，\u8868\u793a\u9891\u7387\u504f\u5dee\u6700\u5927\u7ea6\u4e3a\u767e\u4e07\u5206\u4e4b\u4e94\u5341\u3002<\/li>\n<\/ul>\n<\/li>\n
        • \n

          \u4f5c\u4e3a\u534f\u8bae\u63a5\u53e3\u7684\u65f6\u949f\u57fa\u51c6<\/p>\n

            \n
          • PCIe\u3001SATA\u3001USB\u3001Ethernet \u7b49\u534f\u8bae\u90fd\u5bf9\u53c2\u8003\u65f6\u949f\u6709\u660e\u786e\u8981\u6c42\u3002<\/li>\n<\/ul>\n<\/li>\n
            \n

            3. \u53c2\u8003\u65f6\u949f\u7684\u6765\u6e90<\/h2>\n

            \u5e38\u89c1\u53c2\u8003\u65f6\u949f\u6765\u6e90\u5305\u62ec：<\/p>\n

            3.1 \u6676\u4f53 Crystal<\/h3>\n

            \u6676\u4f53\u672c\u8eab\u4e0d\u80fd\u4e3b\u52a8\u8f93\u51fa\u65f6\u949f，\u9700\u8981\u914d\u5408\u82af\u7247\u5185\u90e8\u632f\u8361\u7535\u8def\u4f7f\u7528\u3002<\/p>\n

            \u7279\u70b9：<\/p>\n

              \n
            • \u6210\u672c\u8f83\u4f4e；<\/li>\n
            • \u8f93\u51fa\u4f9d\u8d56\u82af\u7247\u5185\u90e8\u632f\u8361\u5668；<\/li>\n
            • \u5e38\u89c1\u4e8e MCU\u3001SoC\u3001USB PHY \u7b49；<\/li>\n
            • \u4e00\u822c\u8f93\u51fa\u4e3a\u6b63\u5f26\u6216\u51c6\u6b63\u5f26\u632f\u8361\u4fe1\u53f7\u3002<\/li>\n<\/ul>\n
              \n

              3.2 \u6709\u6e90\u6676\u632f Oscillator<\/h3>\n

              \u6709\u6e90\u6676\u632f\u5185\u90e8\u5df2\u7ecf\u5305\u542b\u632f\u8361\u7535\u8def，\u53ef\u4ee5\u76f4\u63a5\u8f93\u51fa\u65f6\u949f\u3002<\/p>\n

              \u5e38\u89c1\u8f93\u51fa\u7c7b\u578b：<\/p>\n

                \n
              • CMOS；<\/li>\n
              • LVDS；<\/li>\n
              • LVPECL；<\/li>\n
              • HCSL；<\/li>\n
              • CML\u3002<\/li>\n<\/ul>\n

                \u7279\u70b9：<\/p>\n

                  \n
                • \u4f7f\u7528\u7b80\u5355；<\/li>\n
                • \u7a33\u5b9a\u6027\u8f83\u597d；<\/li>\n
                • \u53ef\u76f4\u63a5\u9a71\u52a8\u82af\u7247\u65f6\u949f\u8f93\u5165；<\/li>\n
                • \u6210\u672c\u9ad8\u4e8e\u666e\u901a\u6676\u4f53\u3002<\/li>\n<\/ul>\n
                  \n

                  3.3 \u65f6\u949f\u53d1\u751f\u5668 Clock Generator<\/h3>\n

                  \u65f6\u949f\u53d1\u751f\u5668\u53ef\u4ee5\u4ece\u4e00\u4e2a\u8f93\u5165\u53c2\u8003\u65f6\u949f\u4ea7\u751f\u591a\u4e2a\u4e0d\u540c\u9891\u7387\u3001\u4e0d\u540c\u683c\u5f0f\u7684\u65f6\u949f\u8f93\u51fa\u3002<\/p>\n

                  \u4f8b\u5982：<\/p>\n

                    \n
                  • \u8f93\u5165 25 MHz；<\/li>\n
                  • \u8f93\u51fa 100 MHz PCIe Refclk；<\/li>\n
                  • \u8f93\u51fa 125 MHz Ethernet Clock；<\/li>\n
                  • \u8f93\u51fa 156.25 MHz SerDes Clock\u3002<\/li>\n<\/ul>\n

                    \u7279\u70b9：<\/p>\n

                      \n
                    • \u9002\u5408\u590d\u6742\u7cfb\u7edf；<\/li>\n
                    • \u652f\u6301\u591a\u8def\u8f93\u51fa；<\/li>\n
                    • \u53ef\u914d\u7f6e\u9891\u7387\u3001\u76f8\u4f4d\u3001\u6269\u9891\u3001\u8f93\u51fa\u683c\u5f0f；<\/li>\n
                    • \u5e38\u7528\u4e8e\u670d\u52a1\u5668\u3001\u4ea4\u6362\u673a\u3001\u5d4c\u5165\u5f0f\u5e73\u53f0\u3002<\/li>\n<\/ul>\n
                      \n

                      3.4 PLL \/ Clock Synthesizer<\/h3>\n

                      PLL \u53ef\u4ee5\u901a\u8fc7\u500d\u9891\u3001\u5206\u9891\u3001\u9501\u76f8\u7b49\u65b9\u5f0f\u5408\u6210\u76ee\u6807\u9891\u7387\u3002<\/p>\n

                      \u57fa\u672c\u7ed3\u6784：<\/p>\n

                      \u53c2\u8003\u65f6\u949f \u2192 \u9274\u76f8\u5668 \u2192 \u73af\u8def\u6ee4\u6ce2\u5668 \u2192 VCO \u2192 \u5206\u9891\u5668 \u2192 \u8f93\u51fa\u65f6\u949f <\/p>\n

                      PLL \u7684\u6838\u5fc3\u76ee\u6807\u662f\u8ba9\u8f93\u51fa\u65f6\u949f\u4e0e\u53c2\u8003\u65f6\u949f\u4fdd\u6301\u786e\u5b9a\u7684\u9891\u7387\u548c\u76f8\u4f4d\u5173\u7cfb\u3002<\/p>\n

                      \n

                      4. \u53c2\u8003\u65f6\u949f\u7684\u5173\u952e\u6307\u6807<\/h2>\n

                      \u8bbe\u8ba1\u6216\u9009\u578b\u53c2\u8003\u65f6\u949f\u65f6，\u901a\u5e38\u9700\u8981\u5173\u6ce8\u4ee5\u4e0b\u6307\u6807\u3002<\/p>\n

                      4.1 \u9891\u7387 Frequency<\/h3>\n

                      \u4f8b\u5982：<\/p>\n

                        \n
                      • 25 MHz；<\/li>\n
                      • 100 MHz；<\/li>\n
                      • 125 MHz；<\/li>\n
                      • 156.25 MHz\u3002<\/li>\n<\/ul>\n

                        \u9891\u7387\u5fc5\u987b\u6ee1\u8db3\u76ee\u6807\u82af\u7247\u6216\u534f\u8bae\u8981\u6c42\u3002<\/p>\n

                        \n

                        4.2 \u7cbe\u5ea6 Accuracy<\/h3>\n

                        \u901a\u5e38\u7528 ppm \u8868\u793a\u3002<\/p>\n

                        \u4f8b\u5982：<\/p>\n

                        100 MHz \u00b150 ppm
                        \n\u590d\u5236\u4ee3\u7801 <\/p>\n

                        \u8868\u793a\u5b9e\u9645\u9891\u7387\u8303\u56f4\u4e3a：<\/p>\n

                        100 MHz \u00b1 5 kHz
                        \n\u590d\u5236\u4ee3\u7801 <\/p>\n

                        \u4e5f\u5c31\u662f：<\/p>\n

                        99.995 MHz ~ 100.005 MHz <\/p>\n

                        \n

                        4.3 \u6296\u52a8 Jitter<\/h3>\n

                        \u6296\u52a8\u662f\u65f6\u949f\u8fb9\u6cbf\u76f8\u5bf9\u4e8e\u7406\u60f3\u4f4d\u7f6e\u7684\u65f6\u95f4\u504f\u5dee\u3002<\/p>\n

                        \u5e38\u89c1\u7c7b\u578b：<\/p>\n\n\u7c7b\u578b\u8bf4\u660e<\/tr>\n\n\n\n\n\n\n
                        Period Jitter<\/td>\n\u5468\u671f\u6296\u52a8<\/td>\n<\/tr>\n
                        Cycle-to-Cycle Jitter<\/td>\n\u5468\u671f\u95f4\u6296\u52a8<\/td>\n<\/tr>\n
                        RMS Jitter<\/td>\n\u5747\u65b9\u6839\u6296\u52a8<\/td>\n<\/tr>\n
                        Phase Jitter<\/td>\n\u76f8\u4f4d\u6296\u52a8<\/td>\n<\/tr>\n
                        TIE<\/td>\nTime Interval Error<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

                        \u9ad8\u901f SerDes \u5bf9\u6296\u52a8\u975e\u5e38\u654f\u611f，\u4f8b\u5982 PCIe\u3001SATA\u3001Ethernet\u3002<\/p>\n

                        \n

                        4.4 \u76f8\u4f4d\u566a\u58f0 Phase Noise<\/h3>\n

                        \u76f8\u4f4d\u566a\u58f0\u63cf\u8ff0\u65f6\u949f\u9891\u8c31\u5728\u8f7d\u6ce2\u9644\u8fd1\u7684\u566a\u58f0\u5206\u5e03，\u5355\u4f4d\u901a\u5e38\u662f dBc\/Hz\u3002<\/p>\n

                        \u5b83\u548c jitter \u5bc6\u5207\u76f8\u5173\u3002<\/p>\n

                        \u901a\u5e38：<\/p>\n

                          \n
                        • \u76f8\u4f4d\u566a\u58f0\u8d8a\u4f4e；<\/li>\n
                        • \u79ef\u5206\u6296\u52a8\u8d8a\u5c0f；<\/li>\n
                        • \u9ad8\u901f\u94fe\u8def\u6027\u80fd\u8d8a\u597d\u3002<\/li>\n<\/ul>\n
                          \n

                          4.5 \u5360\u7a7a\u6bd4 Duty Cycle<\/h3>\n

                          \u4f8b\u5982 50% duty cycle\u3002<\/p>\n

                          \u5982\u679c\u65f6\u949f\u5360\u7a7a\u6bd4\u504f\u5dee\u8fc7\u5927，\u53ef\u80fd\u5f71\u54cd\u91c7\u6837\u7a97\u53e3\u3001PLL \u9501\u5b9a\u6216\u903b\u8f91\u65f6\u5e8f\u3002<\/p>\n

                          \n

                          4.6 \u8f93\u51fa\u7535\u5e73\u683c\u5f0f<\/h3>\n

                          \u5e38\u89c1\u683c\u5f0f\u5305\u62ec：<\/p>\n\n\u683c\u5f0f\u7279\u70b9<\/tr>\n\n\n\n\n\n\n
                          CMOS<\/td>\n\u5355\u7aef，\u7b80\u5355，\u4f4e\u6210\u672c<\/td>\n<\/tr>\n
                          LVDS<\/td>\n\u5dee\u5206，\u4f4e\u566a\u58f0<\/td>\n<\/tr>\n
                          LVPECL<\/td>\n\u5dee\u5206，\u9ad8\u901f，\u529f\u8017\u8f83\u9ad8<\/td>\n<\/tr>\n
                          HCSL<\/td>\nPCIe \u5e38\u7528<\/td>\n<\/tr>\n
                          CML<\/td>\n\u9ad8\u901f SerDes \u5e38\u7528<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
                          \n

                          5. \u4ec0\u4e48\u662f SSC \u6269\u9891？<\/h2>\n

                          SSC，\u5168\u79f0 Spread Spectrum Clocking，\u5373\u6269\u9891\u65f6\u949f\u3002<\/p>\n

                          \u5b83\u7684\u6838\u5fc3\u601d\u60f3\u662f：<\/p>\n

                          \u8ba9\u65f6\u949f\u9891\u7387\u5728\u4e00\u4e2a\u5f88\u5c0f\u8303\u56f4\u5185\u5468\u671f\u6027\u53d8\u5316，\u628a\u539f\u672c\u96c6\u4e2d\u5728\u56fa\u5b9a\u9891\u70b9\u4e0a\u7684\u80fd\u91cf\u5206\u6563\u5230\u9644\u8fd1\u9891\u7387\u8303\u56f4\u5185，\u4ece\u800c\u964d\u4f4e EMI \u5cf0\u503c\u3002<\/p>\n

                          \u4e5f\u5c31\u662f\u8bf4，SSC \u5e76\u4e0d\u662f\u964d\u4f4e\u603b\u80fd\u91cf，\u800c\u662f\u628a\u80fd\u91cf\u201c\u644a\u5f00\u201d\u3002<\/p>\n

                          \n

                          6. \u4e3a\u4ec0\u4e48\u9700\u8981 SSC？<\/h2>\n

                          \u6570\u5b57\u7cfb\u7edf\u4e2d，\u65f6\u949f\u662f\u5f3a\u5468\u671f\u4fe1\u53f7，\u4f1a\u5728\u9891\u8c31\u4e0a\u4ea7\u751f\u5c16\u9510\u7684\u9891\u7387\u5cf0\u503c\u3002<\/p>\n

                          \u4f8b\u5982 100 MHz \u65f6\u949f\u4f1a\u5728\u4ee5\u4e0b\u9891\u70b9\u4ea7\u751f\u8f83\u5f3a\u8f90\u5c04：<\/p>\n

                          100 MHz\u3001200 MHz\u3001300 MHz\u3001400 MHz… <\/p>\n

                          \u8fd9\u4e9b\u9891\u70b9\u53ef\u80fd\u5bfc\u81f4 EMC\/EMI \u6d4b\u8bd5\u8d85\u6807\u3002<\/p>\n

                          \u4f7f\u7528 SSC \u540e，\u65f6\u949f\u9891\u7387\u4f1a\u5728\u4e00\u5b9a\u8303\u56f4\u5185\u7f13\u6162\u6446\u52a8，\u4f7f\u9891\u8c31\u80fd\u91cf\u5206\u6563\u3002<\/p>\n

                          \u7ed3\u679c\u662f：<\/p>\n

                          \u5355\u4e2a\u9891\u70b9\u4e0a\u7684\u5cf0\u503c\u964d\u4f4e <\/p>\n

                          \u8fd9\u6709\u52a9\u4e8e\u901a\u8fc7 EMI \u8ba4\u8bc1\u3002<\/p>\n

                          \n

                          7. SSC \u7684\u57fa\u672c\u539f\u7406<\/h2>\n

                          \u5047\u8bbe\u4e00\u4e2a\u539f\u59cb\u53c2\u8003\u65f6\u949f\u4e3a：<\/p>\n

                          100 MHz <\/p>\n

                          \u5982\u679c\u4e0d\u5f00\u542f SSC，\u65f6\u949f\u56fa\u5b9a\u5728：<\/p>\n

                          100.000 MHz <\/p>\n

                          \u5982\u679c\u5f00\u542f -0.5% Down Spread，\u9891\u7387\u53ef\u80fd\u5728：<\/p>\n

                          99.500 MHz ~ 100.000 MHz <\/p>\n

                          \u4e4b\u95f4\u5468\u671f\u6027\u53d8\u5316\u3002<\/p>\n

                          \u8fd9\u6837\u9891\u8c31\u80fd\u91cf\u4e0d\u518d\u96c6\u4e2d\u4e8e 100 MHz，\u800c\u662f\u5206\u5e03\u5728 99.5 MHz \u5230 100 MHz \u4e4b\u95f4\u3002<\/p>\n

                          \n

                          8. SSC \u7684\u6269\u9891\u7c7b\u578b<\/h2>\n

                          8.1 Down Spread<\/h3>\n

                          \u53ea\u5411\u4f4e\u9891\u65b9\u5411\u6269\u5c55\u3002<\/p>\n

                          \u4f8b\u5982：<\/p>\n

                          100 MHz，-0.5% <\/p>\n

                          \u9891\u7387\u8303\u56f4：<\/p>\n

                          99.5 MHz ~ 100 MHz <\/p>\n

                          \u7279\u70b9：<\/p>\n

                            \n
                          • \u4e0d\u8d85\u8fc7\u6807\u79f0\u9891\u7387；<\/li>\n
                          • \u6700\u5e38\u89c1；<\/li>\n
                          • PCIe\u3001SATA \u7b49\u573a\u666f\u5e38\u7528；<\/li>\n
                          • \u5bf9\u8d85\u9891\u654f\u611f\u7cfb\u7edf\u66f4\u5b89\u5168\u3002<\/li>\n<\/ul>\n
                            \n

                            8.2 Center Spread<\/h3>\n

                            \u56f4\u7ed5\u4e2d\u5fc3\u9891\u7387\u4e0a\u4e0b\u6269\u5c55\u3002<\/p>\n

                            \u4f8b\u5982：<\/p>\n

                            100 MHz，\u00b10.25% <\/p>\n

                            \u9891\u7387\u8303\u56f4：<\/p>\n

                            99.75 MHz ~ 100.25 MHz <\/p>\n

                            \u7279\u70b9：<\/p>\n

                              \n
                            • \u5e73\u5747\u9891\u7387\u63a5\u8fd1\u6807\u79f0\u9891\u7387；<\/li>\n
                            • \u53ef\u80fd\u8d85\u8fc7\u6807\u79f0\u6700\u5927\u9891\u7387；<\/li>\n
                            • \u67d0\u4e9b\u534f\u8bae\u4e0d\u5141\u8bb8\u4f7f\u7528\u3002<\/li>\n<\/ul>\n
                              \n

                              8.3 Up Spread<\/h3>\n

                              \u53ea\u5411\u9ad8\u9891\u65b9\u5411\u6269\u5c55\u3002<\/p>\n

                              \u4f8b\u5982：<\/p>\n

                              100 MHz，+0.5% <\/p>\n

                              \u9891\u7387\u8303\u56f4：<\/p>\n

                              100 MHz ~ 100.5 MHz <\/p>\n

                              \u5b9e\u9645\u5e94\u7528\u8f83\u5c11，\u56e0\u4e3a\u53ef\u80fd\u5bfc\u81f4\u82af\u7247\u5de5\u4f5c\u9891\u7387\u8d85\u8fc7\u89c4\u683c\u3002<\/p>\n

                              \n

                              9. SSC \u7684\u5173\u952e\u53c2\u6570<\/h2>\n

                              9.1 \u6269\u9891\u6df1\u5ea6 Spread Deviation<\/h3>\n

                              \u8868\u793a\u9891\u7387\u53d8\u5316\u5e45\u5ea6\u3002<\/p>\n

                              \u5e38\u89c1\u503c：<\/p>\n

                              \u00b10.25%\u3001\u00b10.5%\u3001-0.5%\u3001-0.3% <\/p>\n

                              \u4f8b\u5982：<\/p>\n

                              100 MHz，-0.5% <\/p>\n

                              \u6700\u5927\u9891\u504f\u4e3a：<\/p>\n

                              100 MHz \u00d7 0.5% = 500 kHz <\/p>\n

                              \u9891\u7387\u8303\u56f4：<\/p>\n

                              99.5 MHz ~ 100 MHz <\/p>\n

                              \n

                              9.2 \u8c03\u5236\u9891\u7387 Modulation Frequency<\/h3>\n

                              \u8868\u793a\u9891\u7387\u6446\u52a8\u7684\u901f\u7387\u3002<\/p>\n

                              \u5e38\u89c1\u8303\u56f4：<\/p>\n

                              30 kHz ~ 33 kHz <\/p>\n

                              \u5f88\u591a\u63a5\u53e3\u5982 PCIe \u5e38\u7528\u7ea6 30 kHz \u7ea7\u522b\u7684 SSC \u8c03\u5236\u9891\u7387\u3002<\/p>\n

                              \u8c03\u5236\u9891\u7387\u4e0d\u80fd\u592a\u9ad8，\u5426\u5219\u63a5\u6536\u7aef PLL \u96be\u4ee5\u8ddf\u8e2a；\u4e5f\u4e0d\u80fd\u592a\u4f4e，\u5426\u5219 EMI \u6539\u5584\u6548\u679c\u6709\u9650\u6216\u53ef\u80fd\u5f15\u5165\u4f4e\u9891\u5e72\u6270\u3002<\/p>\n

                              \n

                              9.3 \u8c03\u5236\u6ce2\u5f62 Modulation Profile<\/h3>\n

                              \u5e38\u89c1\u6ce2\u5f62：<\/p>\n

                                \n
                              • \u4e09\u89d2\u6ce2；<\/li>\n
                              • Hershey-Kiss profile；<\/li>\n
                              • \u6b63\u5f26\u6ce2；<\/li>\n
                              • \u81ea\u5b9a\u4e49\u6269\u9891\u66f2\u7ebf\u3002<\/li>\n<\/ul>\n

                                \u4e09\u89d2\u6ce2\u6bd4\u8f83\u5e38\u89c1，\u56e0\u4e3a\u5b83\u80fd\u8f83\u5747\u5300\u5730\u5206\u6563\u9891\u8c31\u80fd\u91cf\u3002<\/p>\n

                                \n

                                10. SSC \u7684\u5de5\u4f5c\u6d41\u7a0b<\/h2>\n

                                \u5178\u578b\u6d41\u7a0b\u5982\u4e0b：<\/p>\n

                                \u57fa\u51c6\u6676\u632f \/ \u8f93\u5165\u65f6\u949f
                                \n \u2193
                                \nPLL \u9501\u5b9a\u53c2\u8003\u9891\u7387
                                \n \u2193
                                \n\u8c03\u5236\u63a7\u5236\u5668\u4ea7\u751f\u4f4e\u9891\u8c03\u5236\u4fe1\u53f7
                                \n \u2193
                                \n\u8c03\u8282 PLL \u5206\u9891\u6bd4\u6216 VCO \u63a7\u5236\u7535\u538b
                                \n \u2193
                                \n\u8f93\u51fa\u9891\u7387\u7f13\u6162\u53d8\u5316\u7684\u65f6\u949f
                                \n \u2193
                                \n\u8d1f\u8f7d\u82af\u7247\u63a5\u6536\u6269\u9891\u65f6\u949f <\/p>\n

                                \u4e5f\u53ef\u4ee5\u7406\u89e3\u4e3a：<\/p>\n

                              • \u65f6\u949f\u53d1\u751f\u5668\u5148\u751f\u6210\u76ee\u6807\u9891\u7387；<\/li>\n
                              • SSC \u6a21\u5757\u6309\u8bbe\u5b9a\u7684\u6269\u9891\u6df1\u5ea6\u548c\u8c03\u5236\u9891\u7387\u8c03\u5236 PLL；<\/li>\n
                              • PLL \u8f93\u51fa\u7684\u65f6\u949f\u9891\u7387\u56f4\u7ed5\u8bbe\u5b9a\u8303\u56f4\u7f13\u6162\u53d8\u5316；<\/li>\n
                              • \u7cfb\u7edf\u4e2d\u7684\u63a5\u6536 PLL \u8ddf\u8e2a\u8fd9\u4e2a\u53d8\u5316；<\/li>\n
                              • \u9ad8\u9891\u65f6\u949f\u9891\u8c31\u5cf0\u503c\u964d\u4f4e，EMI \u6539\u5584\u3002<\/li>\n
                                \n

                                11. SSC \u5bf9\u9891\u8c31\u7684\u5f71\u54cd<\/h2>\n

                                \u672a\u5f00\u542f SSC \u65f6：<\/p>\n

                                \u9891\u8c31\u80fd\u91cf\u96c6\u4e2d\u5728\u56fa\u5b9a\u9891\u70b9，\u5cf0\u503c\u9ad8 <\/p>\n

                                \u793a\u610f：<\/p>\n

                                Amplitude
                                \n |
                                \n | |
                                \n | |
                                \n | |
                                \n—+——–+———— Frequency
                                \n 100 MHz <\/p>\n

                                \u5f00\u542f SSC \u540e：<\/p>\n

                                \u9891\u8c31\u80fd\u91cf\u88ab\u5206\u6563，\u5cf0\u503c\u964d\u4f4e <\/p>\n

                                \u793a\u610f：<\/p>\n

                                Amplitude
                                \n |
                                \n | \/—-\\\\
                                \n | \/ \\\\
                                \n |____\/ \\\\______
                                \n—+——————– Frequency
                                \n 99.5M 100M <\/p>\n

                                \n

                                12. SSC \u7684\u5178\u578b\u5e94\u7528\u573a\u666f<\/h2>\n

                                12.1 PCIe<\/h3>\n

                                PCIe \u5e38\u7528 100 MHz \u53c2\u8003\u65f6\u949f，\u5e76\u4e14\u652f\u6301 SSC\u3002<\/p>\n

                                \u5e38\u89c1\u914d\u7f6e：<\/p>\n

                                100 MHz，Down Spread，-0.5%，\u7ea6 30~33 kHz <\/p>\n

                                \u4f5c\u7528：<\/p>\n

                                  \n
                                • \u964d\u4f4e 100 MHz \u53ca\u5176\u8c10\u6ce2 EMI；<\/li>\n
                                • \u6539\u5584\u6574\u673a EMC \u6d4b\u8bd5\u7ed3\u679c；<\/li>\n
                                • \u5e7f\u6cdb\u7528\u4e8e PC\u3001\u670d\u52a1\u5668\u3001SSD\u3001\u7f51\u5361\u7b49\u8bbe\u5907\u3002<\/li>\n<\/ul>\n

                                  \u6ce8\u610f：<\/p>\n

                                    \n
                                  • PCIe \u94fe\u8def\u4e24\u7aef\u901a\u5e38\u9700\u8981\u4f7f\u7528\u517c\u5bb9\u7684\u53c2\u8003\u65f6\u949f\u7b56\u7565；<\/li>\n
                                  • Common Clock\u3001Separate Refclk\u3001SRIS\/SRNS \u4e0d\u540c\u67b6\u6784\u5bf9 SSC \u8981\u6c42\u4e0d\u540c；<\/li>\n
                                  • \u5982\u679c\u4e00\u7aef\u4f7f\u7528 SSC，\u53e6\u4e00\u7aef\u4e0d\u80fd\u8ddf\u8e2a，\u53ef\u80fd\u5bfc\u81f4\u94fe\u8def\u4e0d\u7a33\u5b9a\u3002<\/li>\n<\/ul>\n
                                    \n

                                    12.2 SATA<\/h3>\n

                                    SATA \u4e5f\u5e38\u7528 SSC \u6765\u964d\u4f4e EMI\u3002<\/p>\n

                                    \u5e38\u89c1\u914d\u7f6e：<\/p>\n

                                    Down Spread，\u7ea6 -0.5% <\/p>\n

                                    \u7528\u4e8e：<\/p>\n

                                      \n
                                    • HDD；<\/li>\n
                                    • SSD；<\/li>\n
                                    • \u4e3b\u677f SATA \u63a7\u5236\u5668；<\/li>\n
                                    • \u5de5\u4e1a\u5b58\u50a8\u8bbe\u5907\u3002<\/li>\n<\/ul>\n
                                      \n

                                      12.3 USB<\/h3>\n

                                      USB PHY \u901a\u5e38\u9700\u8981 24 MHz\u300126 MHz\u300140 MHz \u6216\u5176\u4ed6\u53c2\u8003\u9891\u7387\u3002\u67d0\u4e9b\u5e73\u53f0\u4f1a\u5728\u5185\u90e8 PLL \u6216\u7cfb\u7edf\u65f6\u949f\u4e0a\u4f7f\u7528 SSC，\u4ee5\u964d\u4f4e EMI\u3002<\/p>\n

                                      \u6ce8\u610f：<\/p>\n

                                        \n
                                      • \u4e0d\u662f\u6240\u6709 USB \u53c2\u8003\u65f6\u949f\u90fd\u5141\u8bb8\u5916\u90e8 SSC；<\/li>\n
                                      • \u5fc5\u987b\u67e5\u770b PHY \u6216 SoC \u6570\u636e\u624b\u518c\u3002<\/li>\n<\/ul>\n
                                        \n

                                        12.4 DisplayPort \/ HDMI<\/h3>\n

                                        \u89c6\u9891\u63a5\u53e3\u5177\u6709\u9ad8\u9891\u65f6\u949f\u548c\u9ad8\u901f\u5dee\u5206\u4fe1\u53f7，\u5bb9\u6613\u4ea7\u751f EMI\u3002<\/p>\n

                                        \u6709\u4e9b\u7cfb\u7edf\u4f1a\u5bf9\u50cf\u7d20\u65f6\u949f\u3001\u94fe\u8def\u65f6\u949f\u6216\u5185\u90e8 PLL \u4f7f\u7528\u6269\u9891\u3002<\/p>\n

                                        \u6ce8\u610f：<\/p>\n

                                          \n
                                        • \u663e\u793a\u534f\u8bae\u5bf9\u65f6\u949f\u8bef\u5dee\u3001\u6296\u52a8\u548c\u94fe\u8def\u8bad\u7ec3\u6709\u8981\u6c42；<\/li>\n
                                        • SSC \u914d\u7f6e\u4e0d\u5f53\u53ef\u80fd\u5bfc\u81f4\u9ed1\u5c4f\u3001\u95ea\u5c4f\u6216\u94fe\u8def\u8bad\u7ec3\u5931\u8d25\u3002<\/li>\n<\/ul>\n
                                          \n

                                          12.5 Ethernet \/ SerDes<\/h3>\n

                                          \u9ad8\u901f\u4ee5\u592a\u7f51\u5982 1G\/10G\/25G\/100G \u4f9d\u8d56\u9ad8\u8d28\u91cf\u53c2\u8003\u65f6\u949f\u3002<\/p>\n

                                          \u90e8\u5206\u7cfb\u7edf\u53ef\u4ee5\u4f7f\u7528 SSC，\u4f46\u5e76\u975e\u6240\u6709\u4ee5\u592a\u7f51 PHY\/SerDes \u90fd\u5141\u8bb8\u53c2\u8003\u65f6\u949f\u6269\u9891\u3002<\/p>\n

                                          \u5fc5\u987b\u91cd\u70b9\u786e\u8ba4：<\/p>\n

                                            \n
                                          • PHY \u662f\u5426\u652f\u6301 SSC；<\/li>\n
                                          • CDR \u662f\u5426\u80fd\u8ddf\u8e2a；<\/li>\n
                                          • \u53c2\u8003\u65f6\u949f jitter \u662f\u5426\u6ee1\u8db3；<\/li>\n
                                          • \u534f\u8bae\u662f\u5426\u5141\u8bb8\u6269\u9891\u3002<\/li>\n<\/ul>\n
                                            \n

                                            12.6 CPU \/ SoC \/ DDR<\/h3>\n

                                            \u67d0\u4e9b SoC \u6216\u4e3b\u677f\u4f1a\u5bf9\u7cfb\u7edf\u603b\u7ebf\u3001CPU \u57fa\u51c6\u65f6\u949f\u3001DDR \u76f8\u5173\u65f6\u949f\u8fdb\u884c\u6269\u9891，\u4ee5\u964d\u4f4e\u6574\u673a EMI\u3002<\/p>\n

                                            \u4f46 DDR \u5bf9\u65f6\u5e8f\u88d5\u91cf\u5f88\u654f\u611f，\u6269\u9891\u53ef\u80fd\u5f71\u54cd：<\/p>\n

                                              \n
                                            • setup\/hold margin；<\/li>\n
                                            • memory training；<\/li>\n
                                            • DQS\/DQ timing；<\/li>\n
                                            • \u773c\u56fe\u88d5\u91cf\u3002<\/li>\n<\/ul>\n

                                              \u56e0\u6b64 DDR \u573a\u666f\u9700\u8981\u8c28\u614e\u4f7f\u7528\u3002<\/p>\n

                                              \n

                                              13. SSC \u7684\u4f18\u70b9<\/h2>\n
                                            • \n

                                              \u964d\u4f4e EMI \u5cf0\u503c<\/p>\n

                                                \n
                                              • \u6700\u6838\u5fc3\u4f5c\u7528\u3002<\/li>\n<\/ul>\n<\/li>\n
                                              • \n

                                                \u5e2e\u52a9\u901a\u8fc7 EMC \u8ba4\u8bc1<\/p>\n

                                                  \n
                                                • \u5982 CE\u3001FCC\u3001CISPR \u7b49\u6d4b\u8bd5\u3002<\/li>\n<\/ul>\n<\/li>\n
                                                • \n

                                                  \u51cf\u5c11\u5c4f\u853d\u548c\u6ee4\u6ce2\u6210\u672c<\/p>\n

                                                    \n
                                                  • \u53ef\u4ee5\u964d\u4f4e\u5bf9\u91d1\u5c5e\u5c4f\u853d\u7f69\u3001\u6ee4\u6ce2\u5668\u3001\u590d\u6742 PCB \u5904\u7406\u7684\u4f9d\u8d56\u3002<\/li>\n<\/ul>\n<\/li>\n
                                                  • \n

                                                    \u5bf9\u529f\u80fd\u900f\u660e<\/p>\n

                                                      \n
                                                    • \u5982\u679c\u63a5\u6536\u7aef\u652f\u6301 SSC，\u7cfb\u7edf\u901a\u5e38\u53ef\u4ee5\u6b63\u5e38\u5de5\u4f5c\u3002<\/li>\n<\/ul>\n<\/li>\n
                                                      \n

                                                      14. SSC \u7684\u6f5c\u5728\u95ee\u9898<\/h2>\n

                                                      14.1 \u63a5\u6536\u7aef PLL \u53ef\u80fd\u65e0\u6cd5\u8ddf\u8e2a<\/h3>\n

                                                      SSC \u4f1a\u8ba9\u8f93\u5165\u9891\u7387\u5468\u671f\u6027\u53d8\u5316\u3002\u63a5\u6536\u7aef PLL \u6216 CDR \u5fc5\u987b\u80fd\u8ddf\u8e2a\u8fd9\u79cd\u4f4e\u9891\u8c03\u5236\u3002<\/p>\n

                                                      \u5982\u679c\u4e0d\u80fd\u8ddf\u8e2a，\u53ef\u80fd\u51fa\u73b0：<\/p>\n

                                                        \n
                                                      • PLL unlock；<\/li>\n
                                                      • \u94fe\u8def\u8bad\u7ec3\u5931\u8d25；<\/li>\n
                                                      • \u8bef\u7801\u7387\u5347\u9ad8；<\/li>\n
                                                      • \u7cfb\u7edf\u4e0d\u7a33\u5b9a\u3002<\/li>\n<\/ul>\n
                                                        \n

                                                        14.2 \u589e\u52a0\u4f4e\u9891\u9891\u7387\u8c03\u5236\u6210\u5206<\/h3>\n

                                                        SSC \u672c\u8d28\u4e0a\u662f\u9891\u7387\u8c03\u5236，\u4f1a\u5f15\u5165\u786e\u5b9a\u6027\u7684\u9891\u7387\u53d8\u5316\u3002<\/p>\n

                                                        \u8fd9\u53ef\u80fd\u5f71\u54cd：<\/p>\n

                                                          \n
                                                        • jitter budget；<\/li>\n
                                                        • phase tracking；<\/li>\n
                                                        • latency-sensitive system；<\/li>\n
                                                        • ADC\/DAC \u91c7\u6837\u7cfb\u7edf\u3002<\/li>\n<\/ul>\n
                                                          \n

                                                          14.3 \u4e0d\u9002\u5408\u6240\u6709\u65f6\u949f<\/h3>\n

                                                          \u4f8b\u5982：<\/p>\n

                                                            \n
                                                          • \u9ad8\u7cbe\u5ea6\u8ba1\u65f6；<\/li>\n
                                                          • \u5c04\u9891\u672c\u632f；<\/li>\n
                                                          • \u9ad8\u6027\u80fd ADC\/DAC \u91c7\u6837；<\/li>\n
                                                          • \u97f3\u9891\u4e3b\u65f6\u949f；<\/li>\n
                                                          • \u67d0\u4e9b\u540c\u6b65\u7f51\u7edc\u65f6\u949f\u3002<\/li>\n<\/ul>\n

                                                            \u8fd9\u4e9b\u573a\u666f\u901a\u5e38\u4e0d\u5e0c\u671b\u53c2\u8003\u65f6\u949f\u9891\u7387\u5468\u671f\u6027\u6f02\u79fb\u3002<\/p>\n

                                                            \n

                                                            14.4 \u591a\u65f6\u949f\u57df\u53ef\u80fd\u4ea7\u751f beat \u95ee\u9898<\/h3>\n

                                                            \u5982\u679c\u7cfb\u7edf\u4e2d\u5b58\u5728\u591a\u4e2a\u4e0d\u540c\u7684 SSC \u65f6\u949f，\u800c\u4e14\u8c03\u5236\u9891\u7387\u3001\u76f8\u4f4d\u3001\u6df1\u5ea6\u4e0d\u540c，\u53ef\u80fd\u51fa\u73b0\u4f4e\u9891\u62cd\u9891\u6216\u65f6\u5e8f\u4ea4\u4e92\u95ee\u9898\u3002<\/p>\n

                                                            \n

                                                            15. SSC \u8bbe\u8ba1\u6d41\u7a0b<\/h2>\n

                                                            \u4e00\u4e2a\u5178\u578b SSC \u8bbe\u8ba1\u6d41\u7a0b\u5982\u4e0b：<\/p>\n

                                                            Step 1：\u786e\u8ba4\u534f\u8bae\u548c\u82af\u7247\u662f\u5426\u652f\u6301<\/h3>\n

                                                            \u67e5\u770b：<\/p>\n

                                                              \n
                                                            • SoC datasheet；<\/li>\n
                                                            • PHY datasheet；<\/li>\n
                                                            • PCIe\/SATA\/USB\/Ethernet \u89c4\u8303；<\/li>\n
                                                            • Clock generator datasheet\u3002<\/li>\n<\/ul>\n

                                                              \u91cd\u70b9\u786e\u8ba4：<\/p>\n

                                                              \u662f\u5426\u5141\u8bb8 SSC？
                                                              \n\u652f\u6301 Down Spread \u8fd8\u662f Center Spread？
                                                              \n\u6700\u5927\u6269\u9891\u6df1\u5ea6\u662f\u591a\u5c11？
                                                              \n\u8c03\u5236\u9891\u7387\u8303\u56f4\u662f\u591a\u5c11？
                                                              \njitter \u8981\u6c42\u662f\u591a\u5c11？ <\/p>\n

                                                              \n

                                                              Step 2：\u786e\u5b9a\u65f6\u949f\u67b6\u6784<\/h3>\n

                                                              \u4f8b\u5982：<\/p>\n

                                                              \u6676\u632f \u2192 Clock Generator \u2192 \u591a\u8def Refclk \u2192 SoC \/ PCIe \/ SATA \/ Ethernet <\/p>\n

                                                              \u6216\u8005：<\/p>\n

                                                              SoC \u8f93\u51fa Refclk \u2192 Endpoint <\/p>\n

                                                              \u9700\u8981\u660e\u786e：<\/p>\n

                                                                \n
                                                              • \u54ea\u4e9b\u8bbe\u5907\u5171\u4eab\u540c\u4e00\u6269\u9891\u65f6\u949f；<\/li>\n
                                                              • \u54ea\u4e9b\u8bbe\u5907\u4e0d\u80fd\u4f7f\u7528 SSC；<\/li>\n
                                                              • \u662f\u5426\u9700\u8981\u4e0d\u540c\u8f93\u51fa\u7ec4；<\/li>\n
                                                              • \u662f\u5426\u9700\u8981 buffer；<\/li>\n
                                                              • \u662f\u5426\u9700\u8981 zero-delay buffer\u3002<\/li>\n<\/ul>\n
                                                                \n

                                                                Step 3：\u9009\u62e9 SSC \u6a21\u5f0f<\/h3>\n

                                                                \u5e38\u89c1\u4f18\u5148\u9009\u62e9：<\/p>\n

                                                                Down Spread，-0.5%，30~33 kHz <\/p>\n

                                                                \u4f46\u5177\u4f53\u8981\u6839\u636e\u534f\u8bae\u548c\u82af\u7247\u89c4\u683c\u51b3\u5b9a\u3002<\/p>\n

                                                                \n

                                                                Step 4：\u8bc4\u4f30\u6296\u52a8\u548c\u9891\u504f<\/h3>\n

                                                                \u9700\u8981\u786e\u8ba4：<\/p>\n

                                                                  \n
                                                                • SSC \u5f00\u542f\u540e total jitter \u662f\u5426\u6ee1\u8db3；<\/li>\n
                                                                • \u975e SSC jitter \u662f\u5426\u6ee1\u8db3；<\/li>\n
                                                                • integrated phase jitter \u662f\u5426\u6ee1\u8db3；<\/li>\n
                                                                • \u9891\u7387\u504f\u79fb\u662f\u5426\u5728\u63a5\u6536\u7aef\u5bb9\u5fcd\u8303\u56f4\u5185\u3002<\/li>\n<\/ul>\n
                                                                  \n

                                                                  Step 5：PCB \u8bbe\u8ba1<\/h3>\n

                                                                  \u53c2\u8003\u65f6\u949f\u8d70\u7ebf\u5e94\u6ce8\u610f：<\/p>\n

                                                                    \n
                                                                  • \u5dee\u5206\u963b\u6297\u63a7\u5236，\u5982 85 \u03a9 \/ 100 \u03a9；<\/li>\n
                                                                  • \u5355\u7aef\u963b\u6297\u63a7\u5236，\u5982 50 \u03a9；<\/li>\n
                                                                  • \u5c3d\u91cf\u77ed\u4e14\u5bf9\u79f0；<\/li>\n
                                                                  • \u907f\u514d\u8de8\u5206\u5272\u5e73\u9762；<\/li>\n
                                                                  • \u51cf\u5c11\u8fc7\u5b54；<\/li>\n
                                                                  • \u8fdc\u79bb\u5f00\u5173\u7535\u6e90\u3001\u7535\u611f\u3001RF\u3001\u9ad8\u901f\u4fe1\u53f7；<\/li>\n
                                                                  • \u505a\u597d\u7aef\u63a5\u5339\u914d\u3002<\/li>\n<\/ul>\n
                                                                    \n

                                                                    Step 6：\u5b9e\u9a8c\u9a8c\u8bc1<\/h3>\n

                                                                    \u9a8c\u8bc1\u5185\u5bb9\u5305\u62ec：<\/p>\n

                                                                  • \u793a\u6ce2\u5668\u6d4b\u9891\u7387\u8303\u56f4；<\/li>\n
                                                                  • \u9891\u8c31\u4eea\u89c2\u5bdf EMI \u5cf0\u503c\u53d8\u5316；<\/li>\n
                                                                  • \u76f8\u4f4d\u566a\u58f0\/\u6296\u52a8\u6d4b\u8bd5；<\/li>\n
                                                                  • \u534f\u8bae\u94fe\u8def\u7a33\u5b9a\u6027\u6d4b\u8bd5；<\/li>\n
                                                                  • \u6e29\u5ea6\u3001\u7535\u538b\u3001\u8001\u5316\u6761\u4ef6\u6d4b\u8bd5；<\/li>\n
                                                                  • EMC \u9884\u626b\u548c\u6b63\u5f0f\u8ba4\u8bc1\u6d4b\u8bd5\u3002<\/li>\n
                                                                    \n

                                                                    16. \u5e38\u89c1\u914d\u7f6e\u793a\u4f8b<\/h2>\n

                                                                    \u793a\u4f8b 1：PCIe 100 MHz SSC<\/h3>\n

                                                                    Reference Clock: 100 MHz
                                                                    \nSSC Type: Down Spread
                                                                    \nSpread Depth: -0.5%
                                                                    \nModulation Frequency: 30~33 kHz
                                                                    \nFrequency Range: 99.5 MHz ~ 100 MHz <\/p>\n

                                                                    \u9002\u7528\u4e8e：<\/p>\n

                                                                      \n
                                                                    • PCIe Root Complex；<\/li>\n
                                                                    • PCIe Endpoint；<\/li>\n
                                                                    • SSD；<\/li>\n
                                                                    • \u7f51\u5361；<\/li>\n
                                                                    • \u4e3b\u677f\u3002<\/li>\n<\/ul>\n
                                                                      \n

                                                                      \u793a\u4f8b 2：100 MHz Center Spread<\/h3>\n

                                                                      Reference Clock: 100 MHz
                                                                      \nSSC Type: Center Spread
                                                                      \nSpread Depth: \u00b10.25%
                                                                      \nModulation Frequency: 32 kHz
                                                                      \nFrequency Range: 99.75 MHz ~ 100.25 MHz <\/p>\n

                                                                      \u9002\u7528\u4e8e\u90e8\u5206\u666e\u901a\u7cfb\u7edf\u65f6\u949f，\u4f46\u8981\u786e\u8ba4\u82af\u7247\u662f\u5426\u5141\u8bb8\u8d85\u8fc7\u6807\u79f0\u9891\u7387\u3002<\/p>\n

                                                                      \n

                                                                      \u793a\u4f8b 3：25 MHz \u7cfb\u7edf\u65f6\u949f Down Spread<\/h3>\n

                                                                      Reference Clock: 25 MHz
                                                                      \nSSC Type: Down Spread
                                                                      \nSpread Depth: -0.5%
                                                                      \nFrequency Range: 24.875 MHz ~ 25 MHz <\/p>\n

                                                                      \u9002\u5408\u67d0\u4e9b SoC \u6216\u7cfb\u7edf\u65f6\u949f\u964d EMI，\u4f46\u4e0d\u9002\u5408\u9ad8\u7cbe\u5ea6\u8ba1\u65f6\u6216\u4e25\u683c\u91c7\u6837\u7cfb\u7edf\u3002<\/p>\n

                                                                      \n

                                                                      17. SSC \u4e0e Jitter \u7684\u5173\u7cfb<\/h2>\n

                                                                      SSC \u4f1a\u4f7f\u65f6\u949f\u9891\u7387\u5468\u671f\u6027\u53d8\u5316，\u56e0\u6b64\u4ece\u67d0\u4e9b\u6d4b\u91cf\u89d2\u5ea6\u770b，\u5b83\u4f1a\u8868\u73b0\u4e3a\u4f4e\u9891\u786e\u5b9a\u6027\u6296\u52a8\u6216 wander\u3002<\/p>\n

                                                                      \u9700\u8981\u533a\u5206：<\/p>\n

                                                                      17.1 \u968f\u673a\u6296\u52a8 Random Jitter<\/h3>\n

                                                                      \u7531\u70ed\u566a\u58f0\u3001\u5668\u4ef6\u566a\u58f0\u7b49\u5f15\u8d77，\u901a\u5e38\u4e0d\u53ef\u9884\u6d4b\u3002<\/p>\n

                                                                      17.2 \u786e\u5b9a\u6027\u6296\u52a8 Deterministic Jitter<\/h3>\n

                                                                      \u7531\u4e32\u6270\u3001\u7535\u6e90\u566a\u58f0\u3001SSC \u8c03\u5236\u7b49\u5f15\u8d77，\u5177\u6709\u89c4\u5f8b\u6027\u3002<\/p>\n

                                                                      SSC \u672c\u8eab\u53ef\u80fd\u4f7f\u67d0\u4e9b jitter \u6d4b\u8bd5\u7ed3\u679c\u53d8\u5927，\u56e0\u6b64\u5728\u9ad8\u901f\u63a5\u53e3\u6d4b\u8bd5\u4e2d\u7ecf\u5e38\u9700\u8981\u6839\u636e\u89c4\u8303\u51b3\u5b9a：<\/p>\n

                                                                        \n
                                                                      • \u6d4b\u8bd5\u65f6\u5f00\u542f SSC \u8fd8\u662f\u5173\u95ed SSC；<\/li>\n
                                                                      • jitter filter \u5982\u4f55\u8bbe\u7f6e；<\/li>\n
                                                                      • \u662f\u5426\u4ece jitter \u8ba1\u7b97\u4e2d\u6392\u9664 SSC \u4f4e\u9891\u8c03\u5236\u6210\u5206\u3002<\/li>\n<\/ul>\n
                                                                        \n

                                                                        18. \u5f00\u542f SSC \u540e\u5982\u4f55\u89c2\u5bdf？<\/h2>\n

                                                                        18.1 \u7528\u9891\u8c31\u4eea\u89c2\u5bdf<\/h3>\n

                                                                        \u4e0d\u5f00 SSC：<\/p>\n

                                                                        100 MHz \u5904\u6709\u660e\u663e\u5c16\u5cf0 <\/p>\n

                                                                        \u5f00 SSC：<\/p>\n

                                                                        100 MHz \u9644\u8fd1\u5cf0\u503c\u964d\u4f4e，\u9891\u8c31\u53d8\u5bbd <\/p>\n

                                                                        \n

                                                                        18.2 \u7528\u793a\u6ce2\u5668\u89c2\u5bdf<\/h3>\n

                                                                        \u5728\u65f6\u57df\u4e2d，\u5355\u5468\u671f\u53d8\u5316\u975e\u5e38\u5c0f，\u4e0d\u5bb9\u6613\u76f4\u63a5\u770b\u51fa\u3002<\/p>\n

                                                                        \u53ef\u4ee5\u7528：<\/p>\n

                                                                          \n
                                                                        • frequency trend；<\/li>\n
                                                                        • time interval error trend；<\/li>\n
                                                                        • jitter analysis；<\/li>\n
                                                                        • PLL demodulation；<\/li>\n
                                                                        • clock recovery analysis\u3002<\/li>\n<\/ul>\n
                                                                          \n

                                                                          18.3 \u7528\u76f8\u4f4d\u566a\u58f0\u4eea\u89c2\u5bdf<\/h3>\n

                                                                          SSC \u4f1a\u5728\u4f4e\u9891\u504f\u79fb\u533a\u57df\u8868\u73b0\u51fa\u660e\u663e\u8c03\u5236\u7279\u5f81\u3002<\/p>\n

                                                                          \n

                                                                          19. \u8bbe\u8ba1\u6ce8\u610f\u4e8b\u9879\u603b\u7ed3<\/h2>\n\n\u9879\u76ee\u5efa\u8bae<\/tr>\n\n\n\n\n\n\n\n\n\n\n\n
                                                                          \u662f\u5426\u652f\u6301<\/td>\n\u5fc5\u987b\u67e5\u82af\u7247\u548c\u534f\u8bae\u89c4\u683c<\/td>\n<\/tr>\n
                                                                          \u6269\u9891\u65b9\u5f0f<\/td>\n\u4f18\u5148\u4f7f\u7528 Down Spread<\/td>\n<\/tr>\n
                                                                          \u6269\u9891\u6df1\u5ea6<\/td>\n\u5e38\u89c1 -0.5%，\u4f46\u4e0d\u80fd\u76f2\u7528<\/td>\n<\/tr>\n
                                                                          \u8c03\u5236\u9891\u7387<\/td>\n\u5e38\u89c1\u7ea6 30~33 kHz<\/td>\n<\/tr>\n
                                                                          \u9ad8\u901f\u63a5\u53e3<\/td>\n\u786e\u8ba4\u63a5\u6536\u7aef PLL\/CDR \u53ef\u8ddf\u8e2a<\/td>\n<\/tr>\n
                                                                          \u7cbe\u5bc6\u91c7\u6837<\/td>\nADC\/DAC\/RF\/\u97f3\u9891\u901a\u5e38\u614e\u7528<\/td>\n<\/tr>\n
                                                                          EMI \u9a8c\u8bc1<\/td>\n\u901a\u8fc7\u9891\u8c31\u4eea\u548c EMC \u9884\u626b\u786e\u8ba4<\/td>\n<\/tr>\n
                                                                          \u591a\u65f6\u949f\u7cfb\u7edf<\/td>\n\u907f\u514d\u4e0d\u540c SSC \u6e90\u4e92\u76f8\u5e72\u6270<\/td>\n<\/tr>\n
                                                                          Jitter \u6d4b\u8bd5<\/td>\n\u6ce8\u610f\u6d4b\u8bd5\u65b9\u6cd5\u548c\u6ee4\u6ce2\u8bbe\u7f6e<\/td>\n<\/tr>\n
                                                                          PCB<\/td>\n\u4fdd\u8bc1\u963b\u6297\u3001\u7aef\u63a5\u3001\u4f4e\u4e32\u6270<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
                                                                          \n

                                                                          20. \u7b80\u5355\u603b\u7ed3<\/h2>\n

                                                                          \u53c2\u8003\u65f6\u949f\u662f\u7cfb\u7edf\u4e2d\u5404\u7c7b PLL\u3001PHY\u3001SerDes \u548c\u903b\u8f91\u6a21\u5757\u7684\u57fa\u51c6\u9891\u7387\u6765\u6e90，\u8981\u6c42\u7a33\u5b9a\u3001\u4f4e\u6296\u52a8\u3001\u9891\u7387\u51c6\u786e\u3002<\/p>\n

                                                                          SSC \u6269\u9891\u662f\u5728\u53c2\u8003\u65f6\u949f\u6216 PLL \u8f93\u51fa\u4e0a\u52a0\u5165\u4f4e\u9891\u8c03\u5236，\u4f7f\u65f6\u949f\u9891\u7387\u5728\u5c0f\u8303\u56f4\u5185\u5468\u671f\u6027\u53d8\u5316，\u628a\u96c6\u4e2d\u5728\u67d0\u4e00\u9891\u70b9\u7684\u80fd\u91cf\u5206\u6563\u5230\u90bb\u8fd1\u9891\u5e26\u4e2d，\u4ece\u800c\u964d\u4f4e EMI \u5cf0\u503c\u3002<\/p>\n

                                                                          \u5178\u578b\u914d\u7f6e\u5982：<\/p>\n

                                                                          100 MHz PCIe Refclk
                                                                          \nDown Spread
                                                                          \n-0.5%
                                                                          \n30~33 kHz <\/p>\n

                                                                          SSC \u5bf9 EMC \u5f88\u6709\u5e2e\u52a9，\u4f46\u5fc5\u987b\u786e\u8ba4\u63a5\u6536\u7aef\u548c\u534f\u8bae\u652f\u6301，\u5426\u5219\u53ef\u80fd\u5f15\u8d77 PLL \u5931\u9501\u3001\u94fe\u8def\u4e0d\u7a33\u5b9a\u3001\u8bef\u7801\u7387\u5347\u9ad8\u6216\u65f6\u5e8f\u95ee\u9898\u3002<\/p>\n","protected":false},"excerpt":{"rendered":"

                                                                          \u76ee\u5f55
                                                                          \n1. \u53c2\u8003\u65f6\u949f\u662f\u4ec0\u4e48？
                                                                          \n2. \u53c2\u8003\u65f6\u949f\u7684\u4f5c\u7528
                                                                          \n3. \u53c2\u8003\u65f6\u949f\u7684\u6765\u6e90
                                                                          \n3.1 \u6676\u4f53 Crystal
                                                                          \n3.2 \u6709\u6e90\u6676\u632f Oscillator
                                                                          \n3.3 \u65f6\u949f\u53d1\u751f\u5668 Clock Generator
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