{"id":106442,"date":"2026-09-17T12:16:36","date_gmt":"2026-09-17T04:16:36","guid":{"rendered":"https:\/\/www.wsisp.com\/helps\/106442.html"},"modified":"2026-09-17T12:16:36","modified_gmt":"2026-09-17T04:16:36","slug":"part-0-1-uvm-%e5%85%a8%e6%99%af%e5%af%bc%e5%bc%95%ef%bc%9a%e5%ae%83%e6%98%af%e4%bb%80%e4%b9%88%ef%bc%8c%e5%a6%82%e4%bd%95%e7%bb%84%e7%bb%87%e5%86%85%e5%ad%98","status":"publish","type":"post","link":"https:\/\/www.wsisp.com\/helps\/106442.html","title":{"rendered":"Part 0.1 \u2014 UVM \u5168\u666f\u5bfc\u5f15\uff1a\u5b83\u662f\u4ec0\u4e48\uff0c\u5982\u4f55\u7ec4\u7ec7\u5185\u5b58"},"content":{"rendered":"<p>UVM \u7cfb\u5217\u9996\u7bc7\u3002\u9002\u7528\u4ee3\u7801&#xff1a;kernel-open\/nvidia-uvm\/\u3002 UVM \u5b9e\u73b0\u662f\u7406\u89e3\u4e00\u5bb6 GPU \u9a71\u52a8\u7684\u7edd\u4f73\u5165\u53e3&#xff0c;\u5b83\u628a\u73b0\u4ee3 BO \u7684\u4e00\u751f\u63cf\u7ed8\u7684\u6dcb\u6dcb\u5c3d\u81f4\u3002\u672c\u7cfb\u5217\u5c1d\u8bd5\u89e3\u8bfb \u4e86NVIDIA \u7684 linux \u5185\u6838\u5f00\u6e90\u9a71\u52a8\u7684 UVM&#xff0c;\u770b\u4e0b GPU \u8001\u5927\u7684\u5b9e\u73b0\u3002<\/p>\n<p>\u5173\u8054\u6e90\u7801&#xff1a;uvm.c\u3001uvm.h\u3001uvm_va_space.h\u3001uvm_va_block.h\u3001uvm_mem.h<\/p>\n<h3>1. \u672c\u7bc7\u8981\u56de\u7b54\u7684\u95ee\u9898<\/h3>\n<ul>\n<li>UVM \u5728 NVIDIA \u9a71\u52a8\u6808\u91cc\u5904\u4e8e\u4ec0\u4e48\u4f4d\u7f6e&#xff1f;\u548c CUDA\u3001\u548c\u5185\u6838 RM&#xff08;Resource Manager&#xff09;\u662f\u4ec0\u4e48\u5173\u7cfb&#xff1f;<\/li>\n<li>CPU \u548c GPU&#034;\u5171\u4eab\u540c\u4e00\u5957\u865a\u62df\u5730\u5740\u7a7a\u95f4&#034;\u5230\u5e95\u610f\u5473\u7740\u4ec0\u4e48&#xff1f;<\/li>\n<li>UVM \u7528\u54ea\u51e0\u5c42\u6570\u636e\u7ed3\u6784\u6765\u7ec4\u7ec7\u4e00\u5757\u88ab\u6258\u7ba1\u7684\u5185\u5b58&#xff1f;<\/li>\n<\/ul>\n<p>\u8bfb\u5b8c\u672c\u7bc7\u4f60\u4f1a\u5f97\u5230\u4e00\u5f20\u8d2f\u7a7f\u6574\u4e2a\u4e13\u680f\u7684\u5168\u666f\u5730\u56fe&#xff0c;\u540e\u7eed\u6bcf\u4e00\u7bc7\u90fd\u4f1a\u843d\u5230\u8fd9\u5f20\u56fe\u7684\u67d0\u4e2a\u8282\u70b9\u4e0a\u3002<\/p>\n<h3>2. UVM \u89e3\u51b3\u4ec0\u4e48\u95ee\u9898<\/h3>\n<p>UVM \u8ba9 CPU \u4e0e GPU \u5171\u4eab\u540c\u4e00\u5957\u865a\u62df\u5730\u5740\u7a7a\u95f4&#xff1a;\u540c\u4e00\u4e2a\u6307\u9488\u5728 CPU \u4ee3\u7801\u548c GPU kernel \u91cc\u90fd\u6709\u6548\u3002\u4e00\u5757\u5185\u5b58\u5728\u67d0\u4e00\u65f6\u523b**\u7269\u7406\u9a7b\u7559&#xff08;resident&#xff09;**\u5728\u67d0\u4e2a&#034;\u5904\u7406\u5668&#034;\u4e0a\u2014\u2014\u53ef\u80fd\u662f\u67d0\u5f20 GPU \u7684\u663e\u5b58&#xff08;vidmem&#xff09;&#xff0c;\u4e5f\u53ef\u80fd\u662f CPU \u7684\u7cfb\u7edf\u5185\u5b58&#xff08;sysmem\/DRAM&#xff09;\u3002<\/p>\n<p>\u5f53\u67d0\u4e2a\u5904\u7406\u5668\u8bbf\u95ee\u4e00\u5757\u4e0d\u5728\u672c\u5730\u7684\u5185\u5b58\u65f6&#xff0c;\u4f1a\u89e6\u53d1\u7f3a\u9875&#xff08;fault&#xff09;\u3002UVM \u7684\u6838\u5fc3\u804c\u8d23\u5c31\u662f&#xff1a;<\/p>\n<li>\u6355\u83b7\u7f3a\u9875&#xff1b;<\/li>\n<li>\u51b3\u5b9a\u628a\u9875\u9762\u8fc1\u79fb&#xff08;migrate&#xff09;\u5230\u8bbf\u95ee\u65b9&#xff0c;\u8fd8\u662f\u5efa\u7acb\u8fdc\u7a0b\u6620\u5c04&#xff08;remote mapping&#xff09;&#xff1b;<\/li>\n<li>\u66f4\u65b0\u5bf9\u5e94\u5904\u7406\u5668\u7684\u9875\u8868&#xff0c;\u8ba9\u8bbf\u95ee\u5f97\u4ee5\u7ee7\u7eed\u3002<\/li>\n<p>\u8fd9\u6b63\u662f&#034;Unified&#034;\u7684\u542b\u4e49&#xff1a;\u5e94\u7528\u7a0b\u5e8f\u65e0\u9700\u624b\u52a8 cudaMemcpy \u5728\u4e3b\u673a\u4e0e\u8bbe\u5907\u95f4\u642c\u6570\u636e&#xff0c;UVM \u5728\u7f3a\u9875\u9a71\u52a8\u4e0b\u6309\u9700\u5b8c\u6210\u3002<\/p>\n<h3>3. \u5728\u9a71\u52a8\u6808\u4e2d\u7684\u4f4d\u7f6e<\/h3>\n<p>UVM \u662f\u4e00\u4e2a\u72ec\u7acb\u5185\u6838\u6a21\u5757 nvidia-uvm.ko&#xff0c;\u4f4d\u4e8e CUDA \u8fd0\u884c\u65f6\u4e4b\u4e0b\u3001\u5185\u6838 RM(Resource Manager)\u4e4b\u4fa7&#xff1a;<\/p>\n<p>  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.flowchartTitleText{text-anchor:middle;font-size:18px;fill:#333;}#mermaid-svg-dxZRnat9VWLBpgoc rect.text{fill:none;stroke-width:0;}#mermaid-svg-dxZRnat9VWLBpgoc .icon-shape,#mermaid-svg-dxZRnat9VWLBpgoc .image-shape{background-color:rgba(232,232,232, 0.8);text-align:center;}#mermaid-svg-dxZRnat9VWLBpgoc .icon-shape p,#mermaid-svg-dxZRnat9VWLBpgoc .image-shape p{background-color:rgba(232,232,232, 0.8);padding:2px;}#mermaid-svg-dxZRnat9VWLBpgoc .icon-shape .label rect,#mermaid-svg-dxZRnat9VWLBpgoc .image-shape .label rect{opacity:0.5;background-color:rgba(232,232,232, 0.8);fill:rgba(232,232,232, 0.8);}#mermaid-svg-dxZRnat9VWLBpgoc .label-icon{display:inline-block;height:1em;overflow:visible;vertical-align:-0.125em;}#mermaid-svg-dxZRnat9VWLBpgoc .node .label-icon path{fill:currentColor;stroke:revert;stroke-width:revert;}#mermaid-svg-dxZRnat9VWLBpgoc :root{&#8211;mermaid-font-family:\\&#8221;trebuchet ms\\&#8221;,verdana,arial,sans-serif;}<\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>\u5185\u6838\u6001<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>\u7528\u6237\u6001<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/p>\n<p>ioctl UVM_*<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/p>\n<p>driver ioctl<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/p>\n<p>UVM-RM \u63a5\u53e3<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/p>\n<p>pageable \/ \u7cfb\u7edf\u9875\u8fc1\u79fb<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/p>\n<p>\u9875\u8868 \/ fault \/ CE<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>\u7528\u6237\u7a0b\u5e8f \/ CUDA RuntimecudaMallocManaged, \u8bbf\u95ee\u7edf\u4e00\u5185\u5b58<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>nvidia-uvm.ko(\u672c\u4e13\u680f\u4e3b\u89d2)<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>nvidia.ko \/ RMResource Manager<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>Linux HMM \/ mmu_notifiermigrate_vma, devmem<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>Linux \u5185\u6838 MM\u9875\u5206\u914d \/ NUMA \/ \u9875\u8868<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>GPU \u786c\u4ef6MMU, Fault Buffer, Copy Engine<\/p>\n<p><\/span><\/p>\n<p>\u5173\u952e\u5173\u7cfb&#xff1a;<\/p>\n<ul>\n<li>CUDA \u2192 UVM&#xff1a;\u5e94\u7528\u901a\u8fc7 \/dev\/nvidia-uvm \u8bbe\u5907\u53d1 UVM_* ioctl&#xff08;\u89c1 uvm_ioctl.h&#xff0c;\u5165\u53e3\u5728 uvm.c \u7684 file_operations\u3002<\/li>\n<li>UVM \u2194 RM&#xff1a;\u663e\u5b58\u7269\u7406\u8d44\u6e90\u3001\u901a\u9053\u7b49\u7531 RM \u7ba1\u7406&#xff0c;UVM \u901a\u8fc7 UVM-RM \u63a5\u53e3\u534f\u4f5c\u3002\u6ce8\u610f\u672c\u6587\u4ef6\u5f00\u5934\u5f3a\u8c03&#xff1a;uvm_mem_* \u62bd\u8c61\u4e0d\u4f9d\u8d56 UVM-RM \u63a5\u53e3&#xff0c;\u662f UVM \u81ea\u5efa\u7684\u5206\u914d\u5c42\u3002<\/li>\n<li>UVM \u2194 HMM&#xff1a;\u5bf9\u666e\u901a malloc\/mmap \u5f97\u5230\u7684 pageable \u5185\u5b58&#xff0c;UVM \u501f\u52a9\u5185\u6838 HMM \u7684 migrate_vma \u505a\u8bbe\u5907\u9875\u8fc1\u79fb\u3002<\/li>\n<\/ul>\n<h3>4. \u6838\u5fc3\u672f\u8bed\u901f\u67e5<\/h3>\n<table>\n<tr>\u672f\u8bed\u7ed3\u6784\u4f53\u542b\u4e49<\/tr>\n<tbody>\n<tr>\n<td>VA space<\/td>\n<td>uvm_va_space_t<\/td>\n<td>\u4e00\u4e2a\u8fdb\u7a0b\u7684 UVM \u5730\u5740\u7a7a\u95f4&#xff0c;\u7ba1\u7406\u5df2\u6ce8\u518c GPU\u3001VA range \u6811\u3001peer \u5173\u7cfb\u7b49<\/td>\n<\/tr>\n<tr>\n<td>VA range<\/td>\n<td>uvm_va_range_t \/ uvm_va_range_managed_t<\/td>\n<td>\u4e00\u6bb5\u8fde\u7eed\u865a\u62df\u5730\u5740\u533a\u95f4\u53ca\u5176\u7b56\u7565&#xff08;preferred location\u3001accessed-by \u7b49&#xff09;<\/td>\n<\/tr>\n<tr>\n<td>VA block<\/td>\n<td>uvm_va_block_t<\/td>\n<td>\u8fc1\u79fb \/ \u9a7b\u7559\u8ddf\u8e2a\u7684\u6700\u5c0f\u7ba1\u7406\u5355\u5143&#xff0c;\u6700\u5927 UVM_VA_BLOCK_SIZE&#xff08;2MB&#xff09;<\/td>\n<\/tr>\n<tr>\n<td>chunk<\/td>\n<td>uvm_gpu_chunk_t \/ CPU chunk<\/td>\n<td>\u7269\u7406\u540e\u5907&#xff1a;GPU \u663e\u5b58\u5757&#xff08;\u6765\u81ea PMM&#xff09;\u6216 CPU \u9875<\/td>\n<\/tr>\n<tr>\n<td>processor<\/td>\n<td>uvm_processor_id_t &#043; uvm_processor_mask_t<\/td>\n<td>CPU \u4e0e\u5404 GPU \u7684\u7edf\u4e00\u7f16\u53f7&#xff0c;residency \/ mapping \u90fd\u4ee5\u5b83\u4e3a\u7d22\u5f15<\/td>\n<\/tr>\n<tr>\n<td>resident<\/td>\n<td>\u2014<\/td>\n<td>\u67d0\u9875\u9762\u5f53\u524d\u7269\u7406\u9a7b\u7559\u5728\u54ea\u4e2a\u5904\u7406\u5668<\/td>\n<\/tr>\n<tr>\n<td>make resident<\/td>\n<td>uvm_va_block_make_resident*()<\/td>\n<td>\u628a\u4e00\u7ec4\u9875\u9762\u53d8\u4e3a\u9a7b\u7559\u5728\u76ee\u6807\u5904\u7406\u5668\u4e0a\u7684\u6838\u5fc3\u64cd\u4f5c<\/td>\n<\/tr>\n<tr>\n<td>managed memory<\/td>\n<td>\u6709 uvm_va_range_managed_t<\/td>\n<td>cudaMallocManaged \u5206\u914d\u3001UVM \u76f4\u63a5\u7ba1\u7406<\/td>\n<\/tr>\n<tr>\n<td>pageable memory<\/td>\n<td>\u65e0 managed range<\/td>\n<td>\u666e\u901a malloc\/mmap&#xff0c;\u5728\u652f\u6301\u5e73\u53f0\u4e0a\u7ecf HMM \u8fc1\u79fb<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<h3>5. \u56db\u5c42\u5730\u5740\u6a21\u578b&#xff08;\u5168\u4e13\u680f\u7684\u9aa8\u67b6&#xff09;<\/h3>\n<p>UVM \u7ec4\u7ec7\u4e00\u5757\u6258\u7ba1\u5185\u5b58\u81ea\u9876\u5411\u4e0b\u5206\u56db\u5c42\u3002\u8fd9\u662f\u6574\u4e2a\u4e13\u680f\u6700\u91cd\u8981\u7684\u4e00\u5f20\u56fe&#xff0c;\u540e\u7eed Part 2 \u4f1a\u9010\u5c42\u5c55\u5f00&#xff1a;<\/p>\n<p>  #mermaid-svg-dSQrKvUNZv6oJXbA{font-family:\\&#8221;trebuchet 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.flowchart-link{stroke:#333333;fill:none;}#mermaid-svg-dSQrKvUNZv6oJXbA .edgeLabel{background-color:rgba(232,232,232, 0.8);text-align:center;}#mermaid-svg-dSQrKvUNZv6oJXbA .edgeLabel p{background-color:rgba(232,232,232, 0.8);}#mermaid-svg-dSQrKvUNZv6oJXbA .edgeLabel rect{opacity:0.5;background-color:rgba(232,232,232, 0.8);fill:rgba(232,232,232, 0.8);}#mermaid-svg-dSQrKvUNZv6oJXbA .labelBkg{background-color:rgba(232, 232, 232, 0.5);}#mermaid-svg-dSQrKvUNZv6oJXbA .cluster rect{fill:#ffffde;stroke:#aaaa33;stroke-width:1px;}#mermaid-svg-dSQrKvUNZv6oJXbA .cluster text{fill:#333;}#mermaid-svg-dSQrKvUNZv6oJXbA .cluster span{color:#333;}#mermaid-svg-dSQrKvUNZv6oJXbA div.mermaidTooltip{position:absolute;text-align:center;max-width:200px;padding:2px;font-family:\\&#8221;trebuchet ms\\&#8221;,verdana,arial,sans-serif;font-size:12px;background:hsl(80, 100%, 96.2745098039%);border:1px solid #aaaa33;border-radius:2px;pointer-events:none;z-index:100;}#mermaid-svg-dSQrKvUNZv6oJXbA .flowchartTitleText{text-anchor:middle;font-size:18px;fill:#333;}#mermaid-svg-dSQrKvUNZv6oJXbA rect.text{fill:none;stroke-width:0;}#mermaid-svg-dSQrKvUNZv6oJXbA .icon-shape,#mermaid-svg-dSQrKvUNZv6oJXbA .image-shape{background-color:rgba(232,232,232, 0.8);text-align:center;}#mermaid-svg-dSQrKvUNZv6oJXbA .icon-shape p,#mermaid-svg-dSQrKvUNZv6oJXbA .image-shape p{background-color:rgba(232,232,232, 0.8);padding:2px;}#mermaid-svg-dSQrKvUNZv6oJXbA .icon-shape .label rect,#mermaid-svg-dSQrKvUNZv6oJXbA .image-shape .label rect{opacity:0.5;background-color:rgba(232,232,232, 0.8);fill:rgba(232,232,232, 0.8);}#mermaid-svg-dSQrKvUNZv6oJXbA .label-icon{display:inline-block;height:1em;overflow:visible;vertical-align:-0.125em;}#mermaid-svg-dSQrKvUNZv6oJXbA .node .label-icon path{fill:currentColor;stroke:revert;stroke-width:revert;}#mermaid-svg-dSQrKvUNZv6oJXbA :root{&#8211;mermaid-font-family:\\&#8221;trebuchet ms\\&#8221;,verdana,arial,sans-serif;}<\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>\u7269\u7406\u540e\u5907\u5c42<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>VA block \u5c42&#xff08;\u8fc1\u79fb\u6700\u5c0f\u5355\u5143 \u2264 2MB&#xff09;<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>VA range \u5c42&#xff08;\u533a\u95f4\u6811\u8282\u70b9&#xff09;<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/span><\/p>\n<p>         <span class=\"edgeLabel\"><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>uvm_va_space_t\u8fdb\u7a0b\u7ea7\u5730\u5740\u7a7a\u95f4\u00b7 registered_gpus \u63a9\u7801\u00b7 va_range_tree \u533a\u95f4\u6811\u00b7 \u8bfb\u5199\u4fe1\u53f7\u91cf lock<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>uvm_va_range_managed_t[start, end] &#043; \u7b56\u7565preferred_location \/ accessed_by<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>uvm_va_range_t\u5176\u4ed6\u7c7b\u578b (external \/ channel&#8230;)<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>uvm_va_block_t #1\u00b7 resident\/mapped \u5904\u7406\u5668\u63a9\u7801\u00b7 \u6bcf\u9875 pte_bits \u4f4d\u56fe<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>uvm_va_block_t #2<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>uvm_gpu_chunk_t[]GPU \u663e\u5b58 (PMM)<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>struct page*[]CPU \u7cfb\u7edf\u5185\u5b58<\/p>\n<p><\/span><\/p>\n<p>         <span class=\"nodeLabel\"><\/p>\n<p>HMM \u5206\u914d\u65e0 VA range&#xff1a;uvm_va_space \u2192 uvm_va_block \u76f4\u63a5\u6302\u8f7d<\/p>\n<p><\/span><\/p>\n<p>\u5404\u5c42\u804c\u8d23&#xff1a;<\/p>\n<table>\n<tr>\u5c42\u7ed3\u6784\u4f53\u8d1f\u8d23\u4ec0\u4e48\u672c\u4e13\u680f\u5bf9\u5e94\u7bc7<\/tr>\n<tbody>\n<tr>\n<td>\u8fdb\u7a0b\u5730\u5740\u7a7a\u95f4<\/td>\n<td>uvm_va_space_t<\/td>\n<td>\u6ce8\u518c GPU\u3001\u7ec4\u7ec7 VA range \u6811\u3001\u7ef4\u62a4 peer\/lock<\/td>\n<td>Part 1.1<\/td>\n<\/tr>\n<tr>\n<td>\u865a\u62df\u533a\u95f4 &#043; \u7b56\u7565<\/td>\n<td>uvm_va_range_*<\/td>\n<td>\u8bb0\u5f55 [start, end] \u53ca\u8fc1\u79fb\u7b56\u7565<\/td>\n<td>Part 1.2<\/td>\n<\/tr>\n<tr>\n<td>\u8fc1\u79fb\u5355\u5143<\/td>\n<td>uvm_va_block_t<\/td>\n<td>\u8ddf\u8e2a\u6bcf\u9875\u5728\u5404\u5904\u7406\u5668\u7684\u9a7b\u7559\u4e0e\u6620\u5c04<\/td>\n<td>Part 2.1<\/td>\n<\/tr>\n<tr>\n<td>\u7269\u7406\u540e\u5907<\/td>\n<td>uvm_gpu_chunk_t \/ CPU \u9875<\/td>\n<td>\u771f\u6b63\u7684\u663e\u5b58 \/ \u5185\u5b58\u5b57\u8282<\/td>\n<td>Part 2.2 \/ 2.3<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>\u6ce8\u610f uvm_va_block.h \u9876\u90e8\u6ce8\u91ca\u6307\u51fa\u4e24\u6761\u6302\u8f7d\u8def\u5f84&#xff1a;<\/p>\n<ul>\n<li>Managed&#xff1a;uvm_va_space \u2192 uvm_va_range \u2192 uvm_va_block<\/li>\n<li>HMM&#xff1a;uvm_va_space \u2192 uvm_va_block&#xff08;\u65e0\u4e2d\u95f4 range \u5c42&#xff09;<\/li>\n<\/ul>\n<h4>5.1 \u4e3a\u4ec0\u4e48\u9a7b\u7559\u72b6\u6001\u7528&#034;\u6bcf\u5904\u7406\u5668 &#043; \u6bcf\u9875\u4f4d\u56fe&#034;<\/h4>\n<p>UVM \u7684 uvm_va_block_t \u7528 uvm_processor_mask_t resident \u914d\u5408\u6bcf\u9875\u4f4d\u56fe\u8ddf\u8e2a\u9a7b\u7559&#xff0c;\u800c\u4e0d\u662f\u5355\u4e2a&#034;\u5f53\u524d\u4f4d\u7f6e&#034;\u6574\u6570\u3002\u8fd9\u6837\u540c\u4e00\u4e2a block \u5185\u4e0d\u540c\u9875\u53ef\u4ee5\u9a7b\u7559\u5728\u4e0d\u540c\u5904\u7406\u5668\u4e0a&#xff0c;\u4e5f\u652f\u6301 read-duplication&#xff08;\u540c\u4e00\u9875\u5728\u591a\u5904\u53ea\u8bfb\u526f\u672c&#xff09;\u3002\u8fd9\u662f UVM \u548c AMD SVM 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